Study of the electrical properties of < 100 > Cz p-type solar-grade silicon wafers against the high-temperature processes

• DOI: 10.1007/s00339-021-04578-7
• Publication Date: 2021-05-11T14:03:23Z
• Authors: Mohamed Maoudj; Djoudi Bouhafs; Nacer Eddine Bour...; Abdelhak Hamida-F...; Abdelkader El Amrani
• Keywords: Passivation; Carrier lifetime; Thermal oxidation

The aim of this work is to investigate the bulk stability of the solar-grade silicon versus the temperature processing, as well as the surface passivation versus the chemical oxidation. To this end, the quasi-steady-state photo-conductance (QSSPC) measurements showed degradation in minority carrier lifetime (τeff) after high-temperature processing that involves instability of the silicon wafers face to the thermal processes. Thereby, the bulk investigations indicated the formation of iron–boron (FeB) pairs. These latter are known to be active recombination centers. The FeB pairs formation was highlighted by a study based on sample illumination technique and the crossover point (∆ncop) identification in the injection-dependent lifetime curves. The surface passivation using both chemical and thermal oxide was used aiming to study the surface properties, in the presence of a thin layer of SiO2. The investigations using the hot probe technique revealed the appearance of an inversion layer, leading to type switching of the semiconductor at the surface, going from p- to n-type. This n-layer induces a high surface recombination velocity (SRV), leading to poor surface passivation. This is caused by the diffusion of the phosphorus toward the silicon surface, induced by the presence of a thin layer of SiO2 in the p-type solar-grade wafers.