CSD-RNS-based Single Constant Multipliers
Operand
Constant (computer programming)
DOI:
10.1007/s11265-010-0552-z
Publication Date:
2010-11-03T10:58:34Z
AUTHORS (2)
ABSTRACT
Architectures for designing single constant multipliers in Residue Number System (RNS) for moduli of the 2 n ?1, 2 n and 2 n ?+?1 forms are introduced with the constant operand being recoded in Signed-Digit representation. Two methodologies are proposed. In the first one a straightforward implementation of the shift-and-add algorithm is adopted, while in the second one a graph-based approach is used. Both methodologies result in circuits that are shown to be efficient in terms of area and delay.
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