Near-Ideal Top-Gate Controllability of InGaZnO Thin-Film Transistors by Suppressing Interface Defects with an Ultrathin Atomic Layer Deposited Gate Insulator

• DOI: 10.1021/acsami.2c20176
• Publication Date: 2023-01-29T16:49:47Z
• Authors: Jiye Li; Yuqing Zhang; Jialiang Wang; Huan Yang; Xiaoliang Zhou; Mansun Chan; Xinwei Wang; Lei Lu; Shengdong Zhang
• Keywords: Interface (matter)

An ultrathin atomic-layer-deposited (ALD) AlOx gate insulator (GI) was implemented for self-aligned top-gate (SATG) amorphous InGaZnO (a-IGZO) thin-film transistors (TFTs). Although the 4.0-nm thick exhibited ideal insulating properties, interaction between ALD and predeposited a-IGZO caused a relatively defective interface, thus giving rise to hysteresis bias stress instabilities. As analyzed using high-resolution transmission electron microscopy, X-ray photoelectron spectroscopy, Hall measurement, chemical reaction precursor is revealed. This effectively prevented by preoxidizing with nitrous oxide (N2O) plasma. With 4 nm-AlOx GI low-defect interfaces, high performance stability were simultaneously achieved on SATG TFTs, including near-ideal record-low subthreshold swing of 60.8 mV/dec, low operation voltage below 0.4 V, moderate mobility 13.3 cm2/V·s, off-current 10–13 A, large on/off ratio over 109, negligible threshold-voltage shifts less than 0.04 V against various bias-temperature stresses. work clarifies vital interfacial high-k dielectrics semiconductors (AOSs) further provides feasible way remove this obstacle downscaling AOS TFTs.