Dynamic Gate Delay Time Control of Si/SiC Hybrid Switch for Loss Minimization in Voltage Source Inverter

• DOI: 10.1109/jestpe.2021.3137332
• Publication Date: 2021-12-23T20:39:10Z
• Authors: Zongjian Li; Chao Zhang; Jiajun Yu; Bo Hu; Zhixing He; Jun Wang; Z. John Shen
• Keywords: Insulated-gate bipolar transistor; Gate driver; Switching time; Minification

The voltage source inverter (VSI) based on the Si/SiC hybrid switch (HyS) offers a better cost/performance tradeoff than full-SiC VSI design. However, bears huge power losses with fixed gate turn-off delay time. In this article, novel dynamic optimal time control method of HyS-based is proposed to achieve maximum efficiency over wide load range. obtained by current-based mathematic loss model. A 20-kHz 5-kW prototype single-phase constant current (CC) using 1200-V/25-A insulated bipolar transistor (IGBT) and 1200-V/12.5-A SiC MOSFET built validate method. comparison method, achieves 8% total reduction 0.24% conversion improvement at 1.5-kW output power.