Bias-temperature degradation of pMOSFETs: mechanism and suppression

• DOI: 10.1109/relphy.2000.843916
• Publication Date: 2002-11-07T16:07:59Z
• Authors: M. Makabe; T. Kubota; T. Kitano
• Keywords: 0103 physical sciences; 01 natural sciences

We investigated pMOSFET Bias-Temperature (BT) degradation by using carrier separation analysis. Electrons tunneling from gate electrode to substrate were found to cause impact ionization at the SiO/sub 2//Si interface and result in the creation of trapped charges and interface states. A higher-concentration boron incorporation into the SiO/sub 2/ film was found to suppress BT degradation. This is considered to be a result of tunneling electron current suppression. Degradation due to BT can also be suppressed by reducing the electric field in the oxide between the gate electrode and drain. In other words, BT degradation is lower for the ON-state than the OFF-state. The electric field between the gate electrode and drain can also be reduced by changing the side wall formation process.