Quadruple and Sextuple Cross-Coupled SRAM Cell Designs With Optimized Overhead for Reliable Applications
Robustness
DOI:
10.1109/tdmr.2022.3175324
Publication Date:
2022-05-16T20:15:00Z
AUTHORS (9)
ABSTRACT
Aggressive technology scaling makes modern advanced SRAMs more and vulnerable to soft errors such as single-node upsets (SNUs) double-node (DNUs). This paper proposes two SRAM cells; the first one is called Quadruple Cross-Coupled (QCCS) second Sextuple (SCCS). The QCCS cell comprises four cross-coupled input-split inverters keep stored values, provides self-recoverability from SNUs at low cost. To improve reliability, SCCS uses six construct a large error-interceptive feedback loop hence robustly values. can self-recover all possible part of DNUs; for remaining DNUs, node-separation mechanism used avoid their occurrence. Simulation results demonstrate robustness proposed cells. Moreover, compared with state-of-the-art hardened cells, i.e., NASA13T, RHBD12T, We-Quatro, Zhang14T, QUCCE12T, DNUSRM, QCCM10T, QCCM12T, S4P8N, S8P4N, reduces read access time by 17%, write 19%, power dissipation 4% silicon area overhead 10% on average, while 44% well 13% average cost moderate increase in overhead.
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