A 6.78 MHz active voltage doubler with near-optimal on/off delay compensation for wireless power transfer systems

• DOI: 10.1109/vlsi-dat.2018.8373261
• Publication Date: 2018-06-07T23:36:08Z
• Authors: Fangyu Mao; Yan Lu; U Seng-Pan; Rui P. Martins
• Keywords: 0202 electrical engineering, electronic engineering, information engineering; 02 engineering and technology; 7. Clean energy

This paper presents a fully integrated 6.78 MHz active voltage doubler with a near-optimal on/off delay compensation scheme, achieving the maximized AC to DC power conversion efficiency (PCE) and voltage conversion ratio (VCR) for implantable medical devices (IMDs). In the proposed active voltage doubler design, we build sampling-based feedback loops for the real-time active diode on/off delay compensation. The proposed active voltage doubler was designed with a standard CMOS 0.35 Mm process. It achieves a peak PCE of 92.2% with a 500 Ω load, and a peak VCR of 1.92 with a 2 kfi load, improved by 10% and 33%, respectively, when compared with the voltage doubler without the delay compensation scheme. The input range of this design is from 1 V to 1.7 V with a load range from 200 Ω to 2 ΚΩ.