Pentimento: Data Remanence in Cloud FPGAs

• DOI: 10.1145/3620665.3640355
• Publication Date: 2024-04-22T14:18:06Z
• Authors: Colin Drewes; Olivia Weng; Andres Meza; Alric Althoff; David Kohlbrenner; Ryan Kastner; Dustin Richmond
• Keywords: FOS: Computer and information sciences; Cybersecurity and Privacy; Computer Science - Cryptography and Security; Information and Computing Sciences; Hardware Architecture (cs.AR); Computer Science - Hardware Architecture; Cryptography and Security (cs.CR)

Cloud FPGAs strike an alluring balance between computational efficiency, energy efficiency, and cost. It is the flexibility of the FPGA architecture that enables these benefits, but that very same flexibility that exposes new security vulnerabilities. We show that a remote attacker can recover "FPGA pentimenti" - long-removed secret data belonging to a prior user of a cloud FPGA. The sensitive data constituting an FPGA pentimento is an analog imprint from bias temperature instability (BTI) effects on the underlying transistors. We demonstrate how this slight degradation can be measured using a time-to-digital (TDC) converter when an adversary programs one into the target cloud FPGA. This technique allows an attacker to ascertain previously safe information on cloud FPGAs, even after it is no longer explicitly present. Notably, it can allow an attacker who knows a non-secret "skeleton" (the physical structure, but not the contents) of the victim's design to (1) extract proprietary details from an encrypted FPGA design image available on the AWS marketplace and (2) recover data loaded at runtime by a previous user of a cloud FPGA using a known design. Our experiments show that BTI degradation (burn-in) and recovery are measurable and constitute a security threat to commercial cloud FPGAs.<br/>17 Pages, 8 Figures<br/>