(Digital Presentation) Advanced Process Control of Dual Patterns for FinFET Mass Production

• DOI: 10.1149/ma2022-01291270mtgabs
• Publication Date: 2022-07-14T16:56:19Z
• Authors: Xing Ke; Fengmei Li; Zhenyang Zhao; Shiliang Ji; Xingyu Xiao; Zhengning Li; Changcheng Jiang; Haiyang Zhang
• Keywords: Semiconductor device fabrication

ABSTRACT Advanced Process Control (APC) has been widely applied in state-of-the-art semiconductor industries for the everlasting pursuit of cycle time reduction, higher yield and zero scrap. Inline metrology is thus valuable input feeds improvement wafer-to-wafer within-wafer CD variations originated from either abnormality or noise different processes. Implementing a suitable APC scheme to process flow remains challenging task engineers. In most cases, it enough implement only one single pattern on Chip. However, multi-purpose chip design, control multiple patterns becoming important. this paper, we presented workflow two patterns. It shown that, with same amount layers, were able improve dual control. The final can be controlled within ±0.5 nm. INTRODUCTION Abnormality are inevitable root causes systematic loss mis-process during manufacturing processes [1]. Within-wafer uniformity another important indication capability. Lam tools Hydra Electro Static Chuck (ESC) combining 4 radially-tunable zones grid-heating elements, where additional CDU tuning made possible radial non-radial [2]. schemes normally as anchor point CDU. layouts, areas CDs pitches designed. For instance, controlling both Logic SRAM device performance. When implemented across production flow, utilize properly inline data purpose, demonstrated work. SETUP divided into stages. stage 1, hard mask (HM) patterned Lithograph-Etching (LE) process. An added trimming 2 cover LE etch bias (EB) incapability. Pattern B covered by photoresist materials trim A HM target value. 3, thin Atomic Layer Deposition (ALD) layer deposited etching protection. 4, completed HMs CDs. RESULTS DISCUSSIONS APC, designated scheme. function its Here assume that barely improves B, due fact have line Pitches. 2, turned using 1. exposed isotropic plasma dry until reached. materials, not changed And removed afterward. 3. Fixed-amount ALD protection B. used substrate Si only. During variation 1 transferred all way down without any functioning Figure shows new flow. etched working APC-mode fixed mode. 3 global ALD. A. compensated With stages, effect improved CD/CDU only,