Effect of Thermal Budget on the Electrical Characterization of Atomic Layer Deposited HfSiO/TiN Gate Stack MOSCAP Structure

• DOI: 10.1371/journal.pone.0161736
• Publication Date: 2016-08-29T13:32:44Z
• Authors: Z. N. Khan; S. Ahmed; M. Ali
• Keywords: Metal gate; High-κ dielectric

Metal Oxide Semiconductor (MOS) capacitors (MOSCAP) have been instrumental in making CMOS nano-electronics realized for back-to-back technology nodes. High-k gate stacks including the desirable metal processing and its integration into remain an active research area projecting solution to address requirements of roadmaps. Screening, selection deposition high-k dielectrics, post-deposition thermal processing, choice structure post-metal annealing are important parameters optimize process possibly energy efficiency electronics at nano scales. Atomic layer technique is used throughout this work because known kinetics resulting excellent electrical properties conformal device. The dynamics greatly influence stack consequently reliability as well manufacturable Again, (migration flux layer), time-temperature cycle sequence key influencing device's output characteristics. This presents a careful provide sufficient budget Si MOSCAP with atomic deposited HfSiO dielectric TiN metal. post-process temperatures range 600°C -1000°C rapid dwell time better trade-off between performance Capacitance-Voltage hysteresis leakage current. defect thought be responsible evolution characteristics specifically designed tune low frequency device application.