Bitstream Protection in Dynamic Partial Reconfiguration Systems Using Authenticated Encryption

• DOI: 10.1587/transinf.e96.d.2333
• Publication Date: 2013-11-01T06:46:10Z
• Authors: Yohei HORI; Toshihiro KATASHITA; Hirofumi SAKANE; Kenji TODA; Akashi SATOH
• Keywords: Bitstream; Control reconfiguration; Authenticated Encryption

Protecting the confidentiality and integrity of a configuration bitstream is essential for dynamic partial reconfiguration (DPR) field-programmable gate arrays (FPGAs). This because erroneous or falsified bitstreams can cause fatal damage to FPGAs. In this paper, we present high-speed area-efficient protection scheme DPR systems using Advanced Encryption Standard with Galois/Counter Mode (AES-GCM), which an authenticated encryption algorithm. Unlike many previous studies, our also provides mechanism error recovery tamper resistance against block deletion, insertion, disorder. The implementation evaluation results show that achieves higher performance, in terms speed area, than methods.