Error-corrected Hadamard gate simulated at the circuit level
Quantum Physics
Physics
QC1-999
0103 physical sciences
FOS: Physical sciences
Quantum Physics (quant-ph)
01 natural sciences
DOI:
10.22331/q-2024-07-02-1394
Publication Date:
2024-07-02T16:44:27Z
AUTHORS (5)
ABSTRACT
We simulate the logical Hadamard gate in surface code under a circuit-level noise model, compiling it to physical circuit on square-grid connectivity hardware. Our paper is first do this for unitary quantum error-correction code. consider two proposals, both via patch-deformation: one that applies transversal (i.e. domain wall through time) interchange <mml:math xmlns:mml="http://www.w3.org/1998/Math/MathML"><mml:mi>X</mml:mi></mml:math> and xmlns:mml="http://www.w3.org/1998/Math/MathML"><mml:mi>Z</mml:mi></mml:math> strings, another space achieve interchange. explain detail why they perform by tracking how stabilisers operators are transformed each round. optimise circuits evaluate their failure probabilities, which we find be comparable those of memory experiment same number rounds. present syndrome-extraction maintain effective distance as phenomenological noise. also xmlns:mml="http://www.w3.org/1998/Math/MathML"><mml:mi>S</mml:mi><mml:mi>W</mml:mi><mml:mi>A</mml:mi><mml:mi>P</mml:mi></mml:math>-quantum round (required return patch its initial position) can compiled only four two-qubit layers. This applied more general scenarios and, byproduct, explains from principles "stepping" recent Google \cite{McEwenBaconGidney} constructed.
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