Optimal Physical Implementation of Radiation Tolerant High-Speed Digital Integrated Circuits in Deep-Submicron Technologies

• DOI: 10.3390/electronics8040432
• Publication Date: 2019-04-15T15:15:58Z
• Authors: Jeffrey Prinzie; Karel Appels; Szymon Kulis
• Keywords: Netlist; Triple modular redundancy; Application-specific integrated circuit

This paper presents a novel scalable physical implementation method for high-speed Triple Modular Redundant (TMR) digital integrated circuits in radiation-hard designs. The uses distributed placement strategy compared to commonly used bulk 3-bank constraining method. TMR netlist information is optimally constrain the of both sequential cells and combinational cells. approach significantly reduces routing complexity, net lengths dynamic power consumption with more than 60% 20% respectively. technique was simulated 65 nm Complementary Metal-Oxide Semiconductor (CMOS) technology.