A Probabilistic Cache Sharing Mechanism for Chip Multiprocessors

• DOI: 10.4028/www.scientific.net/amm.135-136.119
• Publication Date: 2011-10-27T12:06:22Z
• Authors: Pei Xiang Yan; Jiang Jiang; Xian Ju Yang; Min Xuan Zhang
• Keywords: Parsec; False sharing; Shared resource

Capacity sharing is efficient for private L2 caches to utilize cache resources in chip multiprocessors. We propose a probabilistic mechanism using reuse replacement strategy. This adopts decoupled tag and data arrays, partitions the arrays into shared regions. Probability introduced control capability of each core compete resources. assign high probabilities cores with stress memory demands dynamically adjust these corresponding monitored run-time demands. Simulation results PARSEC benchmarks show that our exceeds conventional LRU managed cache. Compared without among cores, achieves an average miss rate reduction 8.70%.