Chronus: Understanding and Securing the Cutting-Edge Industry Solutions to DRAM Read Disturbance

• DOI: 10.48550/arxiv.2502.12650
• Publication Date: 2025-02-18
• Authors: Oğuzhan Canpolat; A. Giray Yağlıkçı; Geraldo F. Oliveira; Ataberk Olgun; Nisa Bostancı; İsmail Emir Yüksel; Haocong Luo; Oğuz Ergin; Onur Mutlu
• Keywords: Dram

We 1) present the first rigorous security, performance, energy, and cost analyses of state-of-the-art on-DRAM-die read disturbance mitigation method, Per Row Activation Counting (PRAC) 2) propose Chronus, a new mechanism that addresses PRAC's two major weaknesses. Our analysis shows system performance overhead on benign applications is non-negligible for modern DRAM chips prohibitively large future are more vulnerable to disturbance. identify weaknesses PRAC cause these overheads. First, increases critical access latency parameters due additional time required increment activation counters. Second, performs constant number preventive refreshes at time, making it an adversarial pattern, known as wave attack, consequently requiring be configured significantly smaller thresholds. To address weaknesses, we RowHammer mechanism, Chronus. Chronus updates row counters concurrently while serving accesses by separating from data prevents attack dynamically controlling performed. Chronus's near-zero very low chips. outperforms three variants other solutions. discuss implications systems foreshadow research directions. aid research, open-source our implementation https://github.com/CMU-SAFARI/Chronus.