This work uncovers the potential benefit of fully-depleted short-channel triple-material double-gate (TM-DG) SOI MOSFET in context RF and analog performance characteristics. A systematic, quantitative investigation figures-of-merits (FOMs) TM-DG are presented. The key idea this paper is to demonstrate improved RF, linearity exhibited by over dual-material dual-gate (DM-DG) conventional single-material (SM-DG) MOSFET. Using two-dimensional (2-D) device simulations, we have examined various...

Behavior of adiabatic logic circuits in weak inversion or subthreshold regime is analyzed depth for the first time literature to make great improvement ultralow-power circuit design. This novel approach efficacious low-speed operations where power consumption and longevity are pivotal concerns instead performance. The schematic layout a 4-bit carry look ahead adder (CLA) has been implemented show workability proposed logic. effect temperature process parameter variations on logic-based CLA...

An analytical pseudo-two-dimensional (2-D) model for the transconductance generation factor (gm/Id) of cylindrical surrounding gate (SRG) metal-oxide-semiconductor field effect transistor (MOSFET) is presented. The has been developed by applying Gauss's law in channel depletion region undoped or lightly doped silicon SRG MOSFET working subthreshold regime. In order to validate model, modelled expressions are compared with simulated characteristics obtained from numerical device simulator. A...

For the first time, a pseudo-two-dimensional (2D) approach is extended from rectangular device structure to cylindrical one. A pseudo-2D model applying Gauss's law in channel depletion region for undoped or lightly doped surrounding gate (SRG) silicon metal oxide semiconductor field effect transistor (MOSFETs) working subthreshold regime presented. From this analysis, electrostatic potentials, current characteristics, threshold voltage roll-off, drain-induced barrier lowering and swing are...

SUMMARY This paper presents an analytical subthreshold surface potential model of novel structures called asymmetric pocket‐implanted Double‐Halo Dual‐Material Gate (DHDMG) and Single‐Halo (SHDMG) Metal Oxide Semiconductor Field Effect Transistor (MOSFET), which combines the advantages both channel engineering (halo) gate techniques (dual‐material gate) to effectively suppress short‐channel effects (SCEs). The is derived using pseudo‐2D analysis by applying Gauss's law elementary rectangular...

In this paper an analytical expression of surface potential, threshold voltage and drain current for Single halo Dual Material Double Gate, Halo Gate Triple MOSFETs are formulated by applying Gauss' law to a rectangular box in the channel region, covering total depth depletion region. The characteristic parameters sub regime. uniqueness model lies fact that high-k dielectrics used instead Silicon dioxide. It is seen structure suppresses short effects most effectively when compared other two....

This paper shows that a conventional semi-custom design-flow based on energy efficient adiabatic logic (EEAL) cell library allows any VLSI designer to design and verify complex arithmetic units in simple way, thus, enjoying the reduction benefits of logic. A family EEAL-based 32-bit carry-lookahead adder (CLA) has been designed TSMC 90-nm CMOS process technology verified by CADENCE Design suite. Differential cascode voltage swing (DCVS) used implement newly proposed EEAL it uses only...

Abstract This article presents an analytical surface potential, threshold voltage and drain current model for asymmetric pocket-implanted, single-halo dual material gate double-halo (DHDMG) n-MOSFET (MOSFET, metal–oxide–semiconductor field-effect transistor) operating up to 40 nm regime. The is derived by applying Gauss's law a rectangular box, covering the entire depletion region. pocket-implanted takes into account effective doping concentration of two linear pocket profiles at source ends...

An analytical and accurate subthreshold surface potential model for short channel Conventional, LAC & double halo including the effect of inner fringing field is presented, considering variation with depth depletion layer. With this drawback existing models, assumption a constant layer thickness removed. A pseudo two dimensional method adopted we report more prediction effect.

In this paper, an analytical surface potential and threshold voltage model for surrounding gate metal‐oxide semiconductor field‐effect transistor are proposed considering the quantum mechanical effect (QME). Considering variable Fermi along channel, a simple relation between eigen energies energy distribution is also provided first time. The variation of due to QMEs computed analytically without using any numerical iteration technique in model. QME on drain‐induced barrier lowering roll‐off...

An analytical subthreshold surface potential model for Dual Material Gate MOSFET including the effect of inner fringing field is presented, considering variation with depth channel depletion layer. A pseudo two dimensional method adopted and a more accurate prediction reported.

In applications requiring long-term in situ measurements, or the operation of remote sensors as meteorology and oceanography, power-conserving circuits are especially advantageous. The closed-loop circuit described adjusts coil power an electromagnetic flowmeter when flow velocities exceed a preset threshold value. As consequence, electrical is saved.