A5101466751- Radio Frequency Integrated Circuit Design
- Microwave Engineering and Waveguides
- Millimeter-Wave Propagation and Modeling
- Advancements in PLL and VCO Technologies
- Advanced Power Amplifier Design
- Electromagnetic Compatibility and Noise Suppression
- Semiconductor Lasers and Optical Devices
- Advanced Antenna and Metasurface Technologies
- Advanced Photonic Communication Systems
- Full-Duplex Wireless Communications
- Superconducting and THz Device Technology
- Advanced MIMO Systems Optimization
- GaN-based semiconductor devices and materials
- Photonic and Optical Devices
- Analog and Mixed-Signal Circuit Design
- Agricultural Science and Fertilization
- Optical Network Technologies
- Advancements in Semiconductor Devices and Circuit Design
- Crop Yield and Soil Fertility
- Antenna Design and Analysis
- Mass Spectrometry Techniques and Applications
- Analytical Chemistry and Sensors
- Pesticide Residue Analysis and Safety
- Interconnection Networks and Systems
- Induction Heating and Inverter Technology
Central Agricultural University
2024
Broadcom (United States)
2018
University of Burdwan
2015
Broadcom (Israel)
2014
Georgia Institute of Technology
2004-2010
The IEEE 802.11ad standard supports PHY rates up to 6.7 Gbps on four 2 GHz-wide channels from 57 64 GHz. A 60 GHz system offers higher throughput than existing 802.11ac solutions but has several challenges for high-volume production including: integration in the host platform, automated test, and high link loss due blockage polarization mismatch. This paper presents a radio chipset capable of SC OFDM modulation using 16TX-16RX beamforming RF front-end, complete with an antenna array that...
CMOS-based circuits operating at mm-wave frequencies have emerged in the past few years. This paper discusses integration of a 60GHz CMOS single-chip transmitter and single- chip receiver using standard 90nm technology demonstrating reliable solution for radio. Proper transistor layout, complete accurate modeling optimized parasitic extraction method enabled robust design wideband super-heterodyne architecture to support entire 57- to-66GHz band. The analog radio front-end is controlled by...
A 144-element phased array transceiver is realized using a modular tiled approach that supports 802.11ad, MCS12 single carrier 16-quadratic-amplitude modulation (QAM) 4.6 Gbps, in the 60-GHz band. It consists of system-on-a chip (SOC) (MAC/PHY/BB to IF) 28-nm CMOS, and one IF-to-60-GHz master driving twelve slave chips fabricated 40-nm CMOS. Using master-slave configuration, with 12 phase-controlled TX/RX slices expanded 144 slices. Each final slice then connected two patch antennas on LTCC...
In this paper, we demonstrate the development of advanced three-dimensional (3-D) low-temperature co-fired ceramic (LTCC) system-on-package (SOP) passive components for compact low-cost millimeter-wave wireless front-end modules. Numerous miniaturized easy-to-design circuits that can be used as critical building blocks SOP modules have hereby been realized with high-performance and high-integration potential. One slotted-patch resonator has designed by optimal use vertical coupling mechanism...
Electronics packaging evolution involves system, technology, and material considerations. In this paper, we present a novel three-dimensional (3-D) integration approach for system-on-package (SOP)-based solutions wireless communication applications. This concept is proposed the 3-D of RF millimeter (mm) wave embedded functions in front-end modules by means stacking substrates using liquid crystal polymer (LCP) multilayer /spl mu/BGA technologies. Characterization modeling high-Q inductors...
The IEEE 802.11ad standard supports PHY rates up to 6.7Gb/s on four 2GHz-wide channels from 57 64GHz. A 60GHz system offers higher throughput than existing 802.11ac solutions but has several challenges for high-volume production including: integration in the host platform, automated test, and high link loss due blockage polarization mismatch. This paper presents a full-featured chipset capable of SC OFDM modulation using 16TX-16RX beamforming RF front-end, complete with an antenna array that...
The 802.11ad standard (WiGig) provides throughput speeds of multi-Gb/s covering tens meters and uses beamforming in the four 2GHz-wide channels 60gHz ISM band. Conventional backhaul solutions, on other hand, are designed with high gain directional antennas no electronic beam steering have cost for installation alignment antennas. This paper presents a full-featured chipset 144-element phased array using tiled approach CMOS IPs developed WiGig to address low-cost municipal WiFi, small-cell...
A 60-GHz fully integrated bits-in bits-out on-off keying (OOK) digital radio has been designed in a standard 90-nm CMOS process technology. The transmitter provides 2 dBm of output power at 3.5-Gb/s data rate while consuming 156 mW dc power, including the on-chip frequency synthesizer. pulse-shaping filter to support high rates maintaining spectral efficiency. receiver performs direct-conversion noncoherent demodulation up 3.5 Gb/s 108 for total average transceiver energy consumption 38...
A 60GHz single-chip CMOS radio has been fully integrated using standard 90nm process technology. The digitally controlled wideband super-heterodyne architecture combined with a high-speed digital signal processor designed to support the whole 57 66 GHz bandwidth available, and enable data throughput exceeding 7Gbps QPSK 15Gbps 16QAM for total DC power budget below 200mW. receiver chain provides gain of nearly 50dB noise figure 9dB while amplifier delivers +8.4dBm saturated output at 60GHz....
In this study, two 60-GHz single-chip CMOS transmitters have been fully integrated in a standard 90-nm process, focusing on low-power and high-performance applications, respectively. The transmitter lineup consists of push-push voltage-controlled oscillator (VCO), single-gate up-conversion mixer, three-stage power amplifier. cross-coupled VCO, double-balanced Gilbert-cell mixer with an on-chip Marchand balun, high linearity Measured performances both the VCOs exhibit wide tuning range more...
In this paper, we present four examples of highly integrated 60 GHz single-chip CMOS 90nm digital radios and phased array solutions. These solutions include for the first time digital-to-analog/analog-to-digital conversion embedded multi-gigabit mixed signal modem requiring no external processing. This convergence 60GHz radio, low power mixed-signal processing on a single chip offers lowest energy per bit transmitted wirelessly at rate to meet very stringent low-power specifications battery...
This paper presents the first single-chip 1.5 gigabit/s 60 GHz direct-conversion receiver. It consumes only 37 mW DC power (less than 25 pJ/bit) for a die size of 3 mm times 1 mm. A three-stage front-end LNA, implemented in low-cost 0.15 mum silicon BiCMOS technology and utilizing novel gain-boosting technique, shows 24 dB measured gain with 3.1 3-dB bandwidth consumption mW. DC-biased-diode-based amplitude detector is integrated LNA direct down-conversion amplitude-modulated signal. The...
A 60 GHz power amplifier with 20 dB small signal gain is designed and fabricated using standard 1P7M 90 nm CMOS process technology. An excellent correlation between the simulation measurement demonstrated. The 3-dB bandwidth exceeding 57 to 65 achieved. This delivers +8.2 dBm output P1 a linear of saturated +12.0 maximum PAE 9.0% at 1.2 V operation. When it operated 1.5 achieves 22 gain, 10.0 12.4 power. highest along high max operating in unlicensed band reported till date. temperature...
This paper reports an interconnect modeling approach for RF and millimeter-wave integrated circuits (ICs) using neural network models a novel parasitic extraction verification procedure automatically generated test structures. The effects of the parasitics in RF/millimeter-wave ICs are investigated with special focus on inductances, since they not evaluated by most commercially available tools. State-of-the-art silicon-based multilayer process parameters utilized to extract resistive,...
In this paper, we demonstrate the first implementation of integrated system-on-package (SOP) 60-GHz gigabit modulator and demodulator on liquid-crystal polymer (LCP). LCP provides an organic low-cost low dielectric-constant platform suitable for millimeter-wave passive design packaging. Firstly, a planar bandpass filter RF/baseband duplexer as building blocks module. Measurement results show /spl sim/3-dB insertion loss in filter, well RF path duplexer, higher than 30-dB isolation between...
A 60 GHz power amplifier with 17dB small signal gain is designed and measured using standard 90nm CMOS process technology. Simulation predicted accurate performances. The 3-dB bandwidth exceeding 57 to 65 achieved. This delivers +5.1dBm output P1dB a maximum of at 61 for 54mW total DC consumption, achieving 5.8% PAE saturated +8.4dBm 60GHz. the highest operating in unlicensed band reported till date. first temperature dependent characteristics 60GHz shows very stable operation over entire...
This paper demonstrates, for the first time, a systematic analysis of different CMOS mm-wave phase shifter architectures single chip portable radar. Three active and passive shifters are designed fabricated in standard 1P7M 90 nm process to operate frequency band 50 GHz 56 GHz. The has tuning range 141deg with an average RMS gain error 1.93 dB. innovative quadrature-generator-based & 0.64 dB 6.36deg while 1.36 15deg. To best authors' knowledge, exhibit performances reported till date...
In this paper, we present a highly integrated 60 GHz CMOS/PCB single-chip digital phased array solution, embedded in QFN package. This represents unique opportunity to develop low power 60GHz multi-gigabit radio at similar cost structure as Bleutooth® radio, addressing the needs of multitude bandwidth hungry wireless multimedia applications such high definition streaming and massive side-loading. The convergence CMOS technology, mixed-signal processing filter, antenna standard package is...
Electronic packaging evolution involves systems, technology and material considerations. In this paper, we present a liquid crystal polymer (LCP) based multilayer that is rapidly emerging as an ideal platform for low cost, multi-band reconfigurable RF front-end module integration. LCP's very water absorption (0.04%), cost high electrical performance makes it appealing applications. Here describe main characteristics real of LCP substrate, by means several design examples. A...
In this paper, we describe a systematic design and analysis procedure towards the successful implementation of 3-D low-temperature cofired ceramic (LTCC) multilayer loop directional filters at millimeter-wave frequencies. Directional represent fundamental building block combining multiple filtering for mixing multiplexing operations, hence reducing complexity while maintaining compactness. different vertical coupling schemes are realized in order to implement with performance optimums. The...
This letter presents, for the first time, a 60 GHz four-channel standard compatible heterodyne frequency synthesizer solution with low-cost reference signal. The presented PLL features dual-core varactor-based LC cross-coupled voltage-controlled oscillator (VCO). measured phase noise is -80.1 dBc/Hz at 1 MHz offset, and it limited by of output spectrum shows spur suppression higher than 32 dBc. Using lowest to date (27 MHz), suitable applications in low cost fully integrated multi-gigabit...
Growing fodder oat (Avena sativa L.) genotype with high yielding potential adequate nitrogen could enhance the yield and quality to bridge gap between demand supply of green fodder. Therefore, an experiment was performed evaluate effect different genotypes levels on yield, use efficiency, production economics, agro-meteorological parameters at Dr. Rajendra Prasad Central Agricultural University, Pusa, Samastipur, Bihar. Six genotypes, viz., Kent, JO-07-28, OS-403, OS-6, HFO-904 HFO-906, were...
This paper presents the design and development of a 60GHz 2times passive subharmonic mixer in silicon-germanium (SiGe) process. Wide bandwidth operation is indispensable for integration low power wireless front-end at 59-64GHz license-free frequency band direct up down conversion multi-gigabit digital data. An anti-parallel diode pair (APDP) has been incorporated to generate non-linearity ground shielded coplanar transmission lines as well coupled microstrip section realizes necessary...
In this paper, a novel 4-modulus programmable frequency divider, suitable for millimeter wave PLL synthesizer applications, is presented. The proposed divider designed using dynamic logic D flip-flop, and the implemented in standard 90 nm CMOS technology to achieve high frequencies of operation with very low power consumption. Measurements show maximum input 3.5 GHz, consumption 4.5 mW from 1.0 V supply. To best knowledge authors, shows one figure merit terms speed operation, consumption,...
The design and modeling of multilayer inductors offers considerable challenges to circuit designers because their complex 3D topology. In this paper, we present a neural network based scheme for ceramic system-on-package (SOP) inductor library development. A genetic algorithm optimizer is coupled with the obtained model, subsequent optimization model parameters. This methodology validated by characterization data collected from fabricated in 12 metal layer low-temperature co-fired (LTCC)...