A5076157211- Semiconductor materials and devices
- Advancements in Semiconductor Devices and Circuit Design
- Semiconductor Quantum Structures and Devices
- GaN-based semiconductor devices and materials
- Semiconductor materials and interfaces
- Radio Frequency Integrated Circuit Design
- Electronic Packaging and Soldering Technologies
- Electrostatic Discharge in Electronics
- Copper Interconnects and Reliability
- Ga2O3 and related materials
- Chalcogenide Semiconductor Thin Films
- Quantum Dots Synthesis And Properties
- 3D IC and TSV technologies
- Electrical Contact Performance and Analysis
- Electromagnetic Compatibility and Noise Suppression
- Integrated Circuits and Semiconductor Failure Analysis
- VLSI and FPGA Design Techniques
- Microwave Engineering and Waveguides
- Photocathodes and Microchannel Plates
University of California, Davis
2017
Solid State Physics Laboratory
2007-2014
In this letter, a GaN-based current aperture vertical electron transistor (CAVET) with p-type gate layer and an implantation-based blocking structure is presented. The devices measured showed breakdown voltage of 450 V no dispersion. factors limiting higher voltages in these were carefully studied discussed. grown on sapphire relied box-shaped Mg implanted scheme. This the first demonstration CAVET, respectable on-state characteristics.
AuGe/Ni ohmic contacts are used as source and drain electrodes of pseudomorphic HEMTs (pHEMTs). High alloying temperatures generally believed to be necessary enhance penetration the alloy materials through AlGaAs layers in order establish a very low resistance path for source–drain currents access two-dimensional electron gas (2DEG) layer. Here we have performed experiments temperature range 390–450 °C, contact was determined using transfer length method measurements. Germanium diffusion...
Design and development of a planar schottky diode which is process compatible with general MESFET described here. The device geometry has been designed optimized keeping in view the applications up to Ku-band. was fabricated characterized extract model. Two representative application circuits, viz. two types microwave power limiters were designed, tested show versatility device.
As the size of metal-oxide semiconductor field-effect transistors (MOSFETs) is shrinking, there are new challenges at different stages very-large-scale integration (VLSI) design flow. Several devices densely placed compared to older counterparts. 3-D integrated chip (3-D IC) packaging one famous technologies where in IC contains multiple dies having various modules or subsystems interconnected through silicon via TSVs. One major thermal management. This article proposes a descending order...
Abstract The active layers of Metal Semiconductor Field Effect Transistors (MESFETs) are obtained by Si29+ ion implantation in GaAs. Implantation was done at 35 keV with a higher dose near the wafer surface for facilitating easier formation ohmic contacts, and 180 lower obtaining device channel. Post-implantation annealing carried out rapid thermal processor activating implants. Very high activation levels about 60% n+ GaAs layer, 85% n-GaAs channel layer were achieved 955 °C 25 s....
Optimally alloyed AuGe/Ni/Au source-drain ohmic contacts to MESFETs with very low contact resistance (R <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">c</sub> ) of the order 0.05 - 0.07 Omega-mm were obtained after rapid thermal alloying at 400degC. We have studied degradation elevated temperatures for 4000 hours. Ohmic test structures subjected accelerated life 185degC, 200degC and 230degC. found that drifts in R optimally aging as +13%, which...
We report the fabrication of pseudomorphic high electron mobility transistors (pHEMTs) with engineered recess structure any width choice, by a single lithography and etching step help silicon-nitride-assisted process. In this process, silicon nitride layer is deposited prior to gate lithography. First, etched buffered hydrofluoric acid (BHF) in opening then selective recessing performed. The base can be varying etch time BHF. increases linearly as shown SEM. demonstrate that top photoresist...
Metal semiconductor field effect transistors (MESFETs) and pseudomorphic high electron mobility (pHEMTs) are used in frequency microwave applications monolithic integrated circuits (MMICs). Ground via holes with low inductance to the source electrode of these devices necessary for also increasing packing density MMICs. Dry etching depth 200 μm GaAs using photoresist mask is particularly challenging due its poor selectivity masking material constraints top bottom dimensions smooth sidewall...
<p class="p1"> </p><p class="p2"><span class="s1"> </span>Microstructural and compositional characterisation of electronic materials in support the development GaAs, GaN, GaSb based multilayer device structures is described. Electron microscopy techniques employing nanometer sub-nanometer scale imaging capability structure chemistry have been widely used to characterise various aspects optoelectronic such as InGaAs quantum dots, pseudomorphic (pHEMT),...
Passivation of psuedomorphic high electron mobility transistor (pHEMT) based MMIC's by silicon nitride films deposited PECVD is reported here. These were first optimized for passivation MESFET's to get desired performance. No degradation in pHEMT/MESFET characteristics like I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">dss</sub> , g xmlns:xlink="http://www.w3.org/1999/xlink">m</sub> V xmlns:xlink="http://www.w3.org/1999/xlink">p</sub> and C...
Metamorphic HEMTs on GaAs substrates are promising devices of today as they operated at even higher frequencies for microwave applications compared to pseudomorphic HEMTs. The selective removal n <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">+</sup> InGaAs ohmic contact layer from the top device structure poses a major challenge during fabrication. We have studied influence temperature selectivity etch rate between and underlying InAlAs layers...
This paper describes the study of effect variation topological changes on parameters pseudomorphic HEMTs. Devices with 2 gate fingers, having width 150 ¿m, source-drain spacing 4 ¿m and 3 two different structures, viz., ¿ T types were fabricated. On-wafer measurement S-parameters for devices was done from 100 MHz to 40 GHz under bias conditions. Using this data, all Equivalent Circuit Parameters (ECPs) then extracted each device. method used calculation ECPs spacings, trends various analyzed.