- Analog and Mixed-Signal Circuit Design
- Low-power high-performance VLSI design
- Radio Frequency Integrated Circuit Design
- Advancements in Semiconductor Devices and Circuit Design
- VLSI and FPGA Design Techniques
- Advancements in PLL and VCO Technologies
- Analytical Chemistry and Sensors
- Semiconductor materials and devices
- Sensor Technology and Measurement Systems
- Advanced Memory and Neural Computing
- CCD and CMOS Imaging Sensors
- Advanced MEMS and NEMS Technologies
- VLSI and Analog Circuit Testing
- Neuroscience and Neural Engineering
- Advanced Chemical Sensor Technologies
- Gas Sensing Nanomaterials and Sensors
- Energy Harvesting in Wireless Networks
- Innovative Energy Harvesting Technologies
- Thin-Film Transistor Technologies
- Biosensors and Analytical Detection
- Ferroelectric and Negative Capacitance Devices
- Electromagnetic Compatibility and Noise Suppression
- Photonic and Optical Devices
- ZnO doping and properties
- Embedded Systems Design Techniques
Ain Shams University
2016-2025
Minia University
2023
Military Technical College
2019
University Hospital Magdeburg
2019
Port Said University
2019
Academy of Scientific Research and Technology
2019
Arab Academy for Science, Technology, and Maritime Transport
2019
Electronics Research Institute
2019
King Abdullah University of Science and Technology
2011-2016
American University of Sharjah
2012
A prototypical metal-organic framework (MOF), a 2D periodic porous structure based on the assembly of copper ions and benzene dicarboxylate (bdc) ligands (Cu(bdc)·xH2O), was grown successfully as thin film interdigitated electrodes (IDEs). IDEs have been used for achieving planar CMOS-compatible low-cost capacitive sensing structures detection humidity volatile organic compounds (VOCs). Accordingly, resultant coated with Cu(bdc)·xH2O evaluated, first time, sensor gas applications. fully...
The simple square-law MOSFET model fails to describe the behavior of short channel and moderate/weak inversion devices. gm/ID methodology is a promising technique that addresses shortcomings bridges gap between hand analysis simulation. This paper describes systematic procedure for design single-stage operational-transconductance amplifier (OTA) using methodology. Both small signal large specifications are used constrain process, which graphically illustrated trade-off charts. presented...
A 12 - bit energy-efficient capacitive sensor interface circuit that fully relies on capacitance-domain successive approximation (SAR) technique is presented. Analysis shows for SAR capacitance-to-digital converter (CDC) comparator offset voltage will result in parasitic-dependent conversion errors, which necessitates using an cancellation technique. Based the presented analysis, a CDC uses chain of cascode inverter-based amplifiers with near-threshold biasing proposed to provide robust,...
SUMMARY In this paper, we present for the first time a family of memristor‐based reactance‐less oscillators (MRLOs). The proposed require no reactive components, that is, inductors or capacitors, rather, ‘resistance storage’ property memristor is exploited to generate oscillation. Different types MRLO are presented, and each type, closed form expressions derived oscillation condition, frequency, range Derived equations further verified using transient circuit simulations. A comparison...
Small metal-oxide-metal (MOM) capacitors are essential to energy-efficient mixed-signal integrated circuit design. However, only few reports discuss their matching properties based on large sets of measured data. In this paper, we report femtofarad and sub-femtofarad MOM vertical-field parallel-plate lateral-field fringing capacitors. We study the effect both finger-length finger-spacing mismatch addition, compare area efficiency use direct measurement technique, illustrate its feasibility...
Design productivity remains an important aspect in the analog integrated circuit design industry, as growing competition and shorter cycles pressure traditional flow that involves time-consuming manual iterations a simulator. This paper describes innovations within alternative framework uses precomputed look-up tables (LUTs) to enable fast accurate evaluation of sizing scenarios without simulator loop. It lets designer explore understand space boundaries systematic setting, thus supporting...
The first reactance-less oscillator is introduced. By using a memristor, the can be fully implemented on-chip without need for any capacitors or inductors, which results in an area-efficient integrated solution. concept of operation proposed explained and detailed mathematical analysis Closed-form expressions oscillation frequency conditions are derived. Finally, derived equations verified with circuit simulations showing excellent agreement.
The supramolecular self-assembly of a two-component hydrogel afforded stimuli responsive at room temperature.
High-density memristor-crossbar architecture is a very promising technology for future computing systems. The simplicity of the gateless-crossbar structure both its principal advantage and source undesired sneak-paths current. This parasitic current could consume an enormous amount energy ruin readout process. We introduce new adaptive-threshold techniques that utilize locality hierarchy properties computer-memory system to address problem. proposed methods require single memory access per...
This manuscript focuses on the development of coated sand granules, consisting a thin layer graphite doped with activated carbon (AC) and titanium oxide (TiO2) for continuous removal methylene blue dye. The coating process was carrried out by using polyvinylpyrrolidone (PVP), AC isopropoxide (TiP). graphitic surface 1.0 M KOH solution. Increasing granules' weight from 5 to 10 g considerably enhanced adsorption capacity, minimal improvements observed at 20 g. Calcination temperatures above...
In this work, an energy-efficient noise-shaping (NS) successive-approximation (SAR) capacitance-to-digital converter (CDC) is proposed. The interface based on a direct-comparison technique, in which the sensor capacitance compared directly to on-chip binary weighted capacitive digital-to-analog (DAC). To implement NS, 2nd order feed-forward loop filter processes extracted residue at end of each conversion cycle. Employing NS achieve target resolution leads small DAC and hence Si-area...
Leakage current is one of the main challenges facing high-density MOS-gated memristor arrays. In this study, we show that leakage ruins memory readout process for arrays, and analyze tradeoff between array density its power consumption. We propose a novel technique underlying circuitry, which able to compensate transistor leakage-current effect in gated array.
In this brief, an energy-efficient capacitance-to-digital converter (CDC) is presented. The proposed CDC uses digitally controlled coarse-fine multi-slope integration to digitize a wide range of capacitance in short conversion time. Both current and frequency are scaled, which leads significant improvement the energy efficiency both analog digital circuitry. Mathematical analysis for circuit nonidealities, noise, provided. A prototype fabricated 0.35-μm CMOS process occupies 0.09 mm <sup...
In this paper, we study the design parameters of capacitive interdigitated electrodes (IDEs) and effect these on sensitivity IDEs when employed as a gas sensor. Finite element simulations using COMSOL Multiphysics were carried out to evaluate Simulations show that for permittivity-based sensing, optimum thickness sensing film is slightly more than half wavelength structure. On other hand, films are thinner should be used if required mechanism based structural swelling. Increasing metal can...
We propose a successive-approximation capacitive sensor readout circuit that achieves 35fJ/Step energy efficiency FoM, which represents 4× improvement over the state-of-the-art. A fully differential architecture is employed to provide robustness against common mode noise and errors. An inverter-based amplifier with near-threshold biasing provides robust, fast, energy-efficient operation. Quasi-dynamic operation used maintain for scalable sample rate. hybrid coarse-fine DAC 11.7bit effective...
This paper reports a simple and low-cost technique for fabricating low-power capacitive humidity sensors without the use of cleanroom environment. A maskless laser engraving system was utilized to fabricate two different gold electrode structures, interdigitated electrodes Hilbert's fifth-order fractal. The structures were implemented on flexible PET substrate. usage Nafion, well-known polymer its hydrophilic properties as sensing film, attempted outperformed current efforts in substrates....
This paper presents a biosensor-CMOS platform for measuring the capacitive coupling of biorecognition elements. The biosensor is designed, fabricated, and tested detection quantification protein that reveals presence early-stage cancer. For first time, spermidine/spermine N1 acetyltransferase (SSAT) enzyme has been screened quantified on surface sensor. sensor treated to immobilize antibodies, baseline capacitance reduced by connecting an array capacitors in series fixed exposure area...
In this paper, we present a capacitive sensor digital interface circuit using true capacitance-domain successive approximation that is independent of supply voltage. Robust operation achieved by charge amplifier stage and multiple comparison technique. The insensitive to parasitic capacitances, offset voltages, injection, not prone noise coupling. proposed design achieves very low temperature sensitivity 25ppm/°C. A coarse-fine programmable capacitance array allows digitizing wide range 16pF...
An automated optimization flow for a fully differential switched capacitor amplifier design using the gm/ID methodology is presented in this paper. The operational transconductance (OTA) implemented recycling folded cascode OTA architecture. Accurate expressions input capacitance both low and high frequencies are derived used iteratively to precisely set DC loop gain bandwidth while performing optimization. Binary search interpolation split total noise specification between sampling...
Design optimization of RF low-noise amplifiers (LNAs) remains a time-consuming and complex process. Iterations are needed to adjust impedance matching, gain, noise figure (NF) simultaneously. The process can involve more iterations the non-linear behavior circuit which be represented by input-referred third-order intercept (IIP3). In this work, we present variation-aware automated design flow for wide-band noise-canceling LNA. We include non-linearity in without using simulator loop. By...
In this paper an all-digital pulse output direct digital synthesizer (DDS) is described. The fully implemented on FPGA and does not require any external analog components. Selective over-sampling tapped delay line are used to reduce jitter improve spectral performance. relaxes the requirements with a minor effect power consumption circuit complexity. using clock manager (DCM). generates signals maximum frequency up f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML"...
Bandgap voltage references are indispensable in any analog/mixed-signal system.In this paper, we introduce a systematic gm/ID-based procedure to design CMOS bandgap reference.The proposed iterative methodology relies on one-time-generated precomputed lookup tables (LUTs); thus, it does not require invoking simulator the loop.Despite inherent finite accuracy of LUT-based approach, demonstrate that precision circuit can be designed with less than 1-ppm error.We verified against Spectre...
We report an agglutination-based immunosensor for the quantification of C-reactive protein (CRP). The developed immunoassay sensor requires approximately 15 minutes assay time per sample and provides a sensitivity 0.5 mg/L. have measured capacitance interdigitated electrodes (IDEs) quantified concentration added analyte. proposed method is label free detection hence rapid measurement preferable in diagnostics. so far been able to quantify as low mg/L high 10 By quantifying CRP serum, we can...