A5045616429- Advanced Memory and Neural Computing
- Ferroelectric and Negative Capacitance Devices
- Semiconductor materials and devices
- Stroke Rehabilitation and Recovery
- Parallel Computing and Optimization Techniques
- Forecasting Techniques and Applications
- Neural dynamics and brain function
- Quality and Management Systems
- Quantum Computing Algorithms and Architecture
- Consumer Market Behavior and Pricing
- CCD and CMOS Imaging Sensors
- Machine Learning and ELM
- Evaluation Methods in Various Fields
- Low-power high-performance VLSI design
- Supply Chain and Inventory Management
- Physical Unclonable Functions (PUFs) and Hardware Security
- Neuroscience and Neural Engineering
- Evaluation and Optimization Models
- Quality and Supply Management
- Advanced Data Storage Technologies
- Quantum-Dot Cellular Automata
- Radio Frequency Integrated Circuit Design
- Quality Function Deployment in Product Design
- Analog and Mixed-Signal Circuit Design
Fudan University
2019-2023
Shanghai Fudan Microelectronics (China)
2019-2023
State Key Laboratory of ASIC and System
2019-2023
Southwest Medical University
2014
First Affiliated Hospital of Sichuan Medical University
2014
Wenzhou University
2013
With its unique computer paradigm, the Ising annealing machine has become an emerging research direction. The system is highly effective at addressing combinatorial optimization (CO) problems that are difficult for conventional computers to tackle. However, spins, which comprise system, implement in high-performance physical circuits. We propose a novel type of spin based on electrically-controlled magnetic tunnel junction (MTJ). Electrical operation imparts true randomness, great stability,...
In recent years, the scaling down that Moore’s Law relies on has been gradually slowing down, and traditional von Neumann architecture limiting improvement of computing power. Thus, neuromorphic in-memory hardware proposed is becoming a promising alternative. However, there still long way to make it possible, one problems provide an efficient, reliable, achievable neural network for implementation. this paper, we two-layer fully connected spiking based binary MRAM (Magneto-resistive Random...
High-precision computation with low latency and high energy efficiency is required for AI-driven application scientific computing. Emerging compute-in-memory (CIM) technology shows a great potential to accelerate multiplication accumulation (MAC) operations which are frequently executed in such scenarios. Resistive RAM (RRAM) highly suitable CIM due its excellent features as nonvolatility, small cell size MAC-friendly structure. However, the existing RRAM CIMs focus on acceleration of...
Non-volatile Compute-in-Memory (CIM), especially high-speed MRAM CIM, promises to be a solution of "Memory Wall" problem in power-sensitive artificial intelligence edge devices. However, the low resistance and on/off ratio limit row parallelism efficiency CIM macros. To overcome these challenges, this work proposes following: 1) series 3T1MTJ bit-cell architecture; 2) an input-aware self-generated dynamic reference array; 3) readout pipeline circuit. The proposed macro eliminates errors high...
Physically Unclonable Functions (PUFs) are emerging security primitives for authentication due to its high physical security. Especially those with excellent area-efficiency and reliable immunity against attacks, the demand is larger. In order achieve higher area-efficiency, this paper proposes a strong PUF based on resistive random-access memory (RRAM). We exploit both switching randomness intrinsic resistance distribution of RRAM increase entropy source, design novel structure double-read...
In this study, we establish the evaluation index system based on AHP small and medium-sized enterprise then use decide weight of each index. Moreover, Linear Weighting Method to study supplier performance from perspective quantitative research give measurement process. The empirical research, validate method is scientific feasible.
This paper presents a hybrid computing-in-memory architecture for inference and training stages of two-layer deep neural network, with 96 Kb RRAM 4Kb 7T SRAM. Combining merits SRAM, the provides fast weight-updating training, while achieves 997x lower standby power consumption 1.35x higher area efficiency than SRAM-only scheme. A classification accuracy 91% is obtained resized MNIST task.
Accessing data and programs from off-chip memories cost lots of time energy. In order to reduce this consumption, an 8Kb 2T2MTJ STT-MRAM design is proposed serve as alternative on-chip memory store OS programs. An optimized SA suitable for low input-voltage, combined with the cell structure we used, could achieve high read speed well energy consumption. A time-adjustable write signal generator help choose point consumption in different application scenarios. This adopts 40-nm technology...
Objective To explore event-related potential(ERP) P300 of cerebral infarction patients during motor relearning program.Methods 99 were divided into observation group(52 cases,receiving program) and control group(47 cases,no treatment),and 50 healthy subjects as normal control.After 12 weeks,they measured by:1)Berg balance scale;2)Sheikh body scale;3)Fugl-Meyer movement assessment;4) walk ability 5) ERP P300.Results The scores Berg scale,Fugl-Meyer assessment,Sheikh scale increased...
In this study, we have a research of the small and medium-sized enterprise supply chain supplier based on AHP. For management issues in evaluation establishes index system then uses AHP decide weight each index. Moreover, it Linear Weighting Method to study performance from perspective quantitative gives measurement process. our empirical research, applied method is scientific feasible.
Edge signal processors have difficulty balancing the high throughput and dynamic range (HDR) requirements of modern digital processing (DSP) such as beamforming (DBF) pulse compression due to size, weight power (SWaP) constraints. Compute-in-Memory (CIM) has proven be an energy-efficient high-throughput solution, reducing data transfer on bus. However, shown in Fig. 1, when applied DSP, previous CIM macros face new challenges: 1) general-purpose floating-point (FP) CIMs based logic gates...
This study aims to develop a judgement approach for estimating potential customer demand in the O2O e-commerce environment. The taxonomy used is mainly methodology, and we design it as five steps explore topic. According test results, identified types of combinations regarding feedback behaviour dual channels We further analyse relationships between different type demands.
Resistive-switching Random Access Memory (RRAM) has emerged as a promising candidate for the artificial synaptic in neuromorphic computation circuits due to its similar electronic characteristics with and features such high integration density, non-volatile retention supporting matrix-vector multiplication. In this paper, digitalized RRAM-based fully-connected Spiking Neuron Network (SNN) system 3-bit weight unsupervised online learning scheme is proposed. It consists of 64 pre-neurons 10...
In recent years, the demand for high throughput signal processing is increasing very fast. Traditional von Neumann processors are unable to handle data efficiently because of well-known memory wall and power challenges. As an emerging technology, in-memory-computing has become a hot spot it can alleviate burden at same time, suitable performing efficient operations on signals. The existing work mainly targets artificial neural networks acceleration, with implementation low precision...
To overcome the memory wall problem, in-memory computing (IMC) is proposed to accelerate matrix multiplication. While existing IMC designs encounter problems in scenes where weight updates frequently because of long latency weight-update or short retention time. This paper proposes a semi-floating gate transistor (SFGT) based design improve matrix-multiplication with update weights. Simulation results shows that this achieves access time 5.32ns (1b IN/8b W) and energy efficiency...