A5010837492- Thin-Film Transistor Technologies
- Semiconductor materials and devices
- ZnO doping and properties
- Advancements in Semiconductor Devices and Circuit Design
- GaN-based semiconductor devices and materials
- Electrical and Thermal Properties of Materials
- Silicon and Solar Cell Technologies
National Sun Yat-sen University
2021-2024
In this work, the time-dependent behaviors of dual-channel amorphous InGaZnO (a-IGZO) thin-film transistors (TFTs) under negative bias illumination stress (NBIS) are systematically discussed. The comprised two different IGZO layers fabricated by tuning oxygen flow during deposition. presence heterojunctions enhanced field-effect mobility 1.5× owing to confinement carriers in buried channels because an energy barrier. However, after long periods NBIS stress, degradation a-IGZO TFTs resulted...
In this work, the impact of positive bias stress (PBS) on an all copper(Cu)-electrode a-InGaZnO TFT is discussed. Commonly, Cu diffusion from source/drain electrode after negative (NBS) leads to degradations in on-state current and subthreshold swing. However, study finds that gate insulator layer suffers more serious degradation. Eventually, phenomenon causes a breakdown such it loses transistor function. Results indicate 2000s PBS, accumulation ions forms filament which dominates leakage...
In this study, the electrical characteristics of top-gate amorphous InGaZnO (a-IGZO) thin-film transistors (TFTs) under positive bias stress (PBS) are investigated. Abnormal two-step degradation and hump effects observed PBS. When self-aligned process is applied during interlayer dielectric (ILD) deposition, <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\text{n}^{+}$ </tex-math></inline-formula> IGZO...
This work investigates the abnormal phenomena that are observed in electrical characteristics under negative bias stress (NBS) flexible p-channel low-temperature polycrystalline silicon thin-film transistors (p-channel LTPS TFTs) after TFTs being lifted off from a rigid substrate. During lift-off process, mechanical strain accumulates buffer layer due to unilateral force, thus resulting generation of defects layer. Therefore, degradation behaviors lifted-off were during gate stress. A study...