- Low-power high-performance VLSI design
- Parallel Computing and Optimization Techniques
- CCD and CMOS Imaging Sensors
- Spacecraft Design and Technology
- Radiation Effects in Electronics
- Advanced Memory and Neural Computing
- Embedded Systems Design Techniques
- Space Satellite Systems and Control
- Advancements in Semiconductor Devices and Circuit Design
- Interconnection Networks and Systems
- Advanced Neural Network Applications
- VLSI and FPGA Design Techniques
- Ferroelectric and Negative Capacitance Devices
- Real-Time Systems Scheduling
- Numerical Methods and Algorithms
- Digital Filter Design and Implementation
- UAV Applications and Optimization
- Satellite Communication Systems
- Robotics and Sensor-Based Localization
- Telecommunications and Broadcasting Technologies
- Radio Frequency Integrated Circuit Design
- Quantum-Dot Cellular Automata
- Underwater Vehicles and Communication Systems
- Quantum Computing Algorithms and Architecture
- Advancements in PLL and VCO Technologies
National Technical University of Athens
2017-2025
Intracom Telecom (Greece)
2024
New York University
2023
Villanova University
2023
Approximate computing forms a design alternative that exploits the intrinsic error resilience of various applications and produces energy-efficient circuits with small accuracy loss. In this paper, we propose an approximate hybrid high radix encoding for generating partial products in signed multiplications encodes most significant bits accurate radix-4 least higher encoding. The approximations are performed by rounding values to their nearest power two. proposed technique can be configured...
In this article, we target approximate computing for arithmetic circuits, focusing on the most complex and power-hungry units: hardware multipliers. Driven by lack of a clear solution energy-error efficiency existing multiplication techniques, present new, efficient, easily applied approximation design, as well explore current state-of-the-art design space. We show that proposed scheme can be equally at time to enable synthesis customized multiplier circuits runtime support dynamic tuning...
Approximate computing appears as an emerging and promising solution for energy-efficient system designs, exploiting the inherent error-tolerant nature of various applications. In this paper, targeting multiplication circuits, i.e., energy-hungry counterpart hardware accelerators, extensive exploration error--energy trade-off, when combining arithmetic-level approximation techniques, is performed first time. Arithmetic-aware approximations deliver significant energy reductions, while allowing...
Approximate computing has emerged as a promising design alternative for delivering power-efficient systems and circuits by exploiting the inherent error resiliency of numerous applications. The current article aims to tackle increased hardware cost floating-point multiplication units, which prohibits their usage in embedded computing. We introduce AFMU (Approximate Floating-point MUltiplier), an area/power-efficient family multipliers, apply two approximation techniques resource-hungry...
The advent of powerful edge devices and AI algorithms has already revolutionized many terrestrial applications; however, for both technical historical reasons, the space industry is still striving to adopt these key enabling technologies in new mission concepts. In this context, current work evaluates an heterogeneous multi-core system-on-chip processor use on-board future spacecraft support novel, computationally demanding digital signal processors functionalities. Given importance low...
The success of AI/ML in terrestrial applications and the commercialization space are now paving way for advent satellites. However, limited processing power classical onboard processors drives community towards extending use FPGAs with both rad-hard Commercial-Off-The-Shelf devices. increased performance can be complemented VPU or TPU ASIP coprocessors to further facilitate high-level AI development inflight reconfiguration. Thus, selecting most suitable devices designing efficient avionics...
Convolutional Neural Networks (CNN) plea for improved design at circuit level. Instead of compression, we adopt here arithmetic approximation techniques supporting seamlessly the original structure and type a given network. We focus on convolution explore various approximations towards refining resources and/or throughput any CNN implementation. develop hybrid high radix multipliers, block floating point arithmetic, as well parallel architectures Winograd convolutions to further enhance our...
The advent of space applications with increased computational requirements has led the industry to consider innovative chips and avionics architectures for high-performance on-board data processing. In a relatively limited market, European BRAVE1family Field-Programmable Gate Arrays (FPGAs) offers such novel radiation-hardened solutions. Towards verification, current work devises applies methodology thoroughly assess BRAVE FPGAs their SW tools. paper focuses on NG-Large, i.e., largest FPGA...
Multiplication is an arithmetic operation that has a significant impact on the performance of various real-life applications, such as digital signal processing, image processing and computer vision. In this study, targeting to exploit efficiency alternative number representation formats, authors propose energy-efficient scheme for multiplying 2's-complement binary numbers with two least bits (LSBs). The double-LSB (DLSB) delivers several benefits, symmetric range, negation performed only by...
The advent of computationally demanding algorithms and high data rate instruments in new space applications pushes the industry to explore disruptive solutions for onboard processing. We examine heterogeneous computing architectures involving high-performance low-power commercial SoCs. current paper implements an FPGA with VPU co-processing architecture utilizing CIF & LCD interfaces I/O transfers. A Kintex serves as our framing processor heritage accelerator, while we offload novel DSP/AI...
The workloads of Convolutional Neural Networks (CNNs) exhibit a streaming nature that makes them attractive for reconfigurable architectures such as the Field-Programmable Gate Arrays (FPGAs), while their increased need low-power and speed has established Application-Specific Integrated Circuit (ASIC)-based accelerators alternative efficient solutions. During last five years, development Hardware Description Language (HDL)-based CNN accelerators, either FPGA or ASIC, seen huge academic...
Support Vector Machines (SVM) classifiers are widely used as inference tools in Internet of Things (IoT) and Edge Computing applications. To achieve high classification accuracy, the SVM classifier can turn out to be computationally intensive power hungry component application. In this paper, we enable an efficient implementation, terms performance dissipation, on ultra-low-power multi-core SoC, Intel/Movidius Myriad 2. Experimental results highlight efficiency proposed solution, it achieves...
FPGA-based accelerators of Convolutional Neural Networks (CNNs) deliver significant performance, while leaving much room for optimizations. In this paper, we present a CNN accelerator based on the state-of-the-art Dataflow Hardware Mapping (DHM) methodology, optimized with use 8-bit unsigned integer quantization, 1-bit input mapping and deep-to-shallow conversion techniques. Interestingly, introduce Tensorflow-to-VHDL framework to generate high-performance inferencing FPGAs, adopting...
Abstract Star trackers are crucial for satellite orientation. Improving their efficiency via reconfigurable COTS HW accommodates NewSpace missions. The current work considers SoC FPGAs to leverage both increased reprogramming and high-performance capabilities. Based on a custom sensor+FPGA system, we develop optimize the algorithmic chain of star tracking by focusing acceleration image processing parts. We combine multiple circuit design techniques, such as low-level pipelining, word-length...
Emerging applications and devices in the space industry put forward implementation of on-board high-performance processing. The new European FPGA NGMEDIUM is expected to play a key role this direction owing its radiation-hardened process, high-density, reconfigurability. In current work, we devise methodology evaluate capabilities NG-MEDIUM programming tools. proposed involves numerous successive inter-dependent steps for assessing thoroughly Synthesis, Placement, Routing, Programming...
Approximate computing is an emerging design paradigm, which exploits the inherent error resilience of numerous applications to improve their energy efficiency and/or performance. The current paper focuses on from DSP and AI domains, examines impact arithmetic approximations accelerators for FPGA ASIC technologies. Based our methodology, we implement evaluate approximate architectures image processing, signal filtering, telecommunication digital functions, convolutional neural networks....
The ever-increasing demand for computational power and I/O throughput in space applications is transforming the landscape of on-board computing. A variety Commercial-Off-The-Shelf (COTS) accelerators emerges as an attractive solution payload processing to outperform traditional radiation-hardened devices. Towards increasing reliability such COTS accelerators, current paper explores evaluates fault-tolerance techniques Zynq FPGA Myriad VPU, which are two device families being integrated...
Modern mobile communication systems utilize increased bandwidth to provide advanced network performance and connectivity, all while their most computationally-intensive functions must be accelerated within the limited power envelope of embedded devices. In this paper, we improve circuit complexity throughput a key digital function in baseband processing chain, namely high-order QAM demodulation. particular, explore 4 different demodulation algorithms, employ both floating- fixed-point...
Nowadays, the rapid growth of Deep Neural Network (DNN) architectures has established them as defacto approach for providing advanced Machine Learning tasks with excellent accuracy. Targeting low-power DNN computing, this paper examines interplay fine-grained error resilience workloads in collaboration hardware approximation techniques, to achieve higher levels energy efficiency. Utilizing state-of-the-art ROUP approximate multipliers, we systematically explore their distribution across...
The rapid growth of demanding applications in domains applying multimedia processing and machine learning has marked a new era for edge cloud computing. These involve massive data compute-intensive tasks, thus, typical computing paradigms embedded systems centers are stressed to meet the worldwide demand high performance. Concurrently, landscape semiconductor field last 15 years constituted power as first-class design concern. As result, community is forced find alternative approaches...
The challenging deployment of compute-intensive applications from domains such Artificial Intelligence (AI) and Digital Signal Processing (DSP), forces the community computing systems to explore new design approaches. Approximate Computing appears as an emerging solution, allowing tune quality results in a system order improve energy efficiency and/or performance. This radical paradigm shift has attracted interest both academia industry, resulting significant research on approximation...