To achieve high frequency and efficiency over a wide load range, monolithic voltage-mode dc-dc buck converter with advanced burst mode (ABM) pulsewidth modulation (PWM) is presented in this paper. The current detected by estimating the currents flowing through high-side low-side switches, which maintains near constant changing point. A counter-based scheme used to seamless smooth transition between PWM ABM. Both operating modes share same control blocks, no additional zero detecting circuit...

Considering the propagation delay, dVSW/dt immunity, and power dissipation issues in bootstrapped high-side gate driver design, a monolithic high-voltage dc-dc buck converter with high-speed dynamic level shifter improved drive buffer is presented this article. With introduction of instantaneous current, delay reduced to 1.13 ns for switch. The immunity enhanced by current compensation during positive slewing diode voltage clamp negative slewing. average consumption only 8.45 μA at switching...

A driver for high-voltage (HV) single chip synchronous buck converters with a n-channel lateral double diffused MOS (nLDMOS) as power switches and high speed low level shifter is presented. Using short time fast pull-down circuit, the realized limited bias current. The circuit implemented using UMC 0.5-μm 30V LDMOS process, has been integrated into converter, which requires input voltage up to 25V.

<?Pub Dtl=""?> Considering the tradeoff between efficiency and output ripple over a wide load range, monolithic dc–dc buck converter with switch-on-demand modulation (SODM) switch size control (SSC) is presented in this paper. SODM achieves hybrid mode of pulse skip width (PWM) without detection circuit. The converter's on time adaptively adjusted demand, achieving low voltage ripple. Detecting error amplifier by comparator, SSC circuit can select appropriate according to current for...

We introduced a wireless optical communication system in this paper. Through the analysis of two main channels system: diffuse channel and light sight (LOS) channel, we researched influence multipath effect on power distribution SNR under given transmission rate. The method reasonable layout LED array is proposed. simulation results show that had great can't be ignored. After optimization, indoor uniformity improved, area covered by bigger, better information transmission, receiver to meet...

This study presents a novel short-circuit protection technique for DC-DC buck converters. The required operating frequency is derived in order to avoid the effect of inherent propagation delay controller and power transistors. In this design, switching approximately 31% normal value. Simultaneously, peak current limit decreased about 40% value lower dissipation when event occurs. Once fault condition removed, converters can automatically return operation smoothly by clamping soft-start...

An adaptive slope compensation circuit applied to buck DC-DC converters is presented in this paper. Based on the basic theory of compensation, conditional expression loop stability gained. According expression, using feed-forward control input voltage and feed-back output voltage, provided with adaptivity, which makes system stable variation duty cycle all time. In addition, proposed improves system's loading capacity transient response high cycle. The designed base Samsung BCH4 process, its...

An on-chip CMOS current-sensing circuit for a DC-DC buck converter is presented. The can measure the inductor current through sensing voltage of switch node during on-state. By matching MOSFETs, achieved sense ratio almost independent temperature, model and supply voltage. proposed suitable low power applications with high load current.

An average current‐sensing circuit integrated in a hybrid DC–DC buck converter is presented. Both the high‐side and low‐side switch currents are fully sensed by detecting filtered smooth voltage of node, which maintains substantially constant mode changing point seamless transition between pulse width modulation (PWM) frequency (PFM) under various duty cycles. The achieved almost independent temperature supply voltage. proposed suitable for high‐frequency applications.

A novel internal soft-start circuit with simple topology for DC-DC buck converters is presented. It implemented by controlling the output of error amplifier to make switch current limit increases in steps without using external capacitor, which reduces component cost, saves board space and benefits portable applications. This designed on basis Hynix 0.5 mum CMOS process, its performance has been verified Hspice simulation measurement results. Avoiding inrush overshoot vloltage, IC starts up...

A soft-start circuit with soft-recovery function for DC-DC converters is presented in this paper. The strategy based on a linearly ramped-up reference and an error amplifier minimum selector implemented three-limb differential pair skillfully. compact clamp circuit. ramp voltage would be clamped once the feedback detected lower than threshold, which could control output to recovered slowly linearly. monolithic buck converter proposed has been fabricated 0.5μm CMOS process validation....

Considering the high-voltage dc-dc buck regulator applications, a high-speed dynamic level shifter for high-side bootstrapped gate driver is presented. By introducing an instantaneous current, propagation delay of reduced to 0.25 ns switch. The dV <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$_{SW}/dt$ </tex-math></inline-formula> immunity and reliability are improved by clamp circuit during positive...

In this paper, an improved inductor simulator structure is presented, which can be configured as either grounded or floating with low component count. To achieve simplified structure, circuits are designed using a minimal number of transistors and small capacitance, rather than the complex components/modules such current convey operational trans-conductance amplifier traditionally used. The simulation results based on $$0.5\, \upmu \hbox {m}$$ CMOS process parameters show that proposed able...

A novel start-up circuit with simple topology used in boost DC-DC converters is presented. Its minimum supply voltage as low 1V. It can meet the needs of and dissipation. The paper introduces spirit design detail, presents actual finally. This designed on basis Hynix 0.5/spl mu/m CMOS process, its performance has been verified by Hspice simulation.

A ripple-based constant on-time (RBCOT) control scheme is excellent in achieving fast transient response during the load current step. However, it suffers from severe electromagnetic interference (EMI) noise and inherent output voltage offset problem. monolithic adaptive (RBAOT)-controlled buck converter presented to overcome both drawbacks while retaining advantage of RBCOT. The adjusted adaptively by detecting switching node voltage, thereby ensuring a pseudofixed frequency steady state,...

A synchronous boost DC–DC converter with an adaptive dead time control (DTC) circuit and anti-ringing is presented. The DTC used to provide adjustable zero inductor current detection for power transistors therefore, a high efficiency achieved by minimizing losses, such as the shoot-through loss, body diode conduction charge-sharing loss reverse loss. Simultaneously, novel controlled switching sequence of developed suppress ringing when enters discontinuous mode (DCM) low electromagnetic...

A pseudo-type-III compensation circuit integrated in a 2.25-MHz voltage-mode dc–dc buck regulator is presented. By summing high- and low-frequency signal paths at the outputs of an error amplifier, two zeros are generated to counteract pair complex <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="TeX">$LC$</tex-math></inline-formula> poles. Comparing with traditional various reported type-III compensation, proposed...

A current-mode buck DC-DC controller based on adaptive on-time (AOT) control is presented. The obtained by the techniques of input feedforward and output feedback, achieved a sample-hold time-ahead circuit. AOT scheme not only obtains excellent transient response speed, but also achieves independence loop stability capacitor ESR. In addition, does have subharmonic oscillation phenomenon seen in fixed frequency peak control, so there no need slope compensation auto-skip pulse modulation (PFM)...

This study presents a fixed‐frequency adaptive on‐time buck converter with ramp compensation internally, which uses valley current‐mode control. The is obtained by feed forwarding input voltage and output voltage, easy to implement. control method provides fast transient response, wide duty ratio high efficiency for both heavy light load. In traditional converter, the ripple determines moment when main power metal oxide semiconductor field effect transistor being turned on. Different from...

A switch size control circuit for voltage-mode DC-DC buck converter is presented. By detecting the average load current, not only achieves hybrid mode of PWM and PFM operation, but also changes power according to conditions. Both high-side low-side currents are fully sensed by filtered smooth voltage node. The generated digital signal maintains a substantially constant changing point. monolithic using proposed has been fabricated with 0.5μm CMOS process validation. 1/3 maximum value in...

A novel bootstrap driver circuit applied to high voltage buck DC–DC converter is proposed. The gate of the side switch regulated by a feedback loop obtain accurate and stable bootstrapped voltage. charging current capacitor provided input power directly instead internal low source, so larger capability proposed can be achieved. starts charge before node SW drop zero at high-side off-time. Thus inadequate avoided. has been implemented in with 0.6 µm 40 V CDMOS process. experimental results...

An improved structure of the lateral double-diffused metal–oxide–semiconductor (LDMOS) field-effect transistor with high-permittivity layer is proposed. It features some floating field plates added on device surface, which not only enhances robustness to resist effect interface charges, but also improves electric distribution and ameliorates relationship between breakdown voltage (BV) specific ON-resistance ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML"...

A novel on-chip frequency compensation circuit for a voltage-mode control DC/DC converter is presented. By employing an RC network in the two signal paths of operational transconductance amplifier (OTA), proposed generates zeros to realize high closed-loop stability. Meanwhile, full integration also achieved due its simple structure. Hence, number off-chip components and board space greatly reduced. The structure dual path OTA optimized help get better transition response. Implemented 0.5 μm...

A monolithic current-mode DC-DC buck converter with internal load independent compensation is presented in this paper. The proposed compact structure overcomes the drawback of traditional stability dependency on resistance and ceramic output capacitor's ESR, which reduces complexity design saves PCB space. has been fabricated a standard 0.5 mum CMOS process. Internal technique provides high loop stability, both line regulations are less than plusmn0.4%. And voltage can recover within 8 mus...