A5050432571- Radio Frequency Integrated Circuit Design
- Microwave Engineering and Waveguides
- Advancements in PLL and VCO Technologies
- Photonic and Optical Devices
- Millimeter-Wave Propagation and Modeling
- 3D IC and TSV technologies
- Microwave and Dielectric Measurement Techniques
- Semiconductor Lasers and Optical Devices
- Magnetic Field Sensors Techniques
- Antenna Design and Optimization
- Analog and Mixed-Signal Circuit Design
- Electromagnetic Compatibility and Noise Suppression
- Semiconductor materials and devices
- Power Line Communications and Noise
- Advanced Photonic Communication Systems
- Magneto-Optical Properties and Applications
- Antenna Design and Analysis
- Wireless Body Area Networks
Tokyo Institute of Technology
2013-2019
This paper presents an ultra-wideband millimeter-wave (mm-wave) wireless transceiver (TRX) achieving 120Gb/s data-rate, which is the highest rate among state-of-the-art mm-wave transceivers [1-4]. The data-rate of realized by two 15GBaud data streams in 16-QAM modulation (2×15×4b/symbol=120Gb/s). total 30GBaud signal up- and down-converted with 70GHz 105GHz LO signals, are generated a doubler tripler from external 35GHz source input more than 29dBc 38dBc undesired harmonic suppression,...
This paper presents 64-quadrature amplitude modulation (QAM) 60-GHz CMOS transceivers with four-channel bonding capability, which can be categorized into a one-stream transceiver and two-stream frequency-interleaved (FI) transceiver. The are both fabricated in standard 65-nm technology. For the proposed transceiver, TX-to-RX error vector magnitude (EVM) is less than -23.9 dB for 64-QAM wireless communication all four channels defined IEEE 802.11ad/WiGig. maximum distance full rate reach 0.13...
This paper presents a 64-QAM 60GHz CMOS transceiver, which achieves TX-to-RX EVM of -26.3dB and can transmit 10.56Gb/s in all four channels defined IEEE802.11ad/WiGig. By using 4-bonded channel, 28.16Gb/s be transmitted 16QAM. The front-end consumes 251mW 220mW from 1.2-V supply transmitting receiving mode, respectively. Figure 20.3.1 shows the direct-conversion design. transmitter consists 6-stage PA, differential preamplifiers, I/Q passive mixers quadrature injection-locked oscillator...
This paper presents a 56Gb/s 16-QAM 65nm CMOS transceiver using W-band carrier. Two wideband IF signals are up- and downconverted simultaneously with 68GHz 102GHz carriers. The achieves data-rate TX-to-RX EVM of -16.5dB within 0.1m distance. consumes 260mW 300mW from 1V supply in TX RX modes, respectively. results 10pJ/bit efficiency, which is state-of-the-art-efficient high-data-rate mm-Wave transceiver.
It is predicted that the required wireless communication capacity will become 1000 times higher every 10 years. Many standards are under discussion to satisfy unprecedented requirement. For example, IEEE802.11ay standard targeting over 100Gb/s data-rate by using 60GHz band. Unfortunately, channel bandwidth of 2.16GHz for band not wide enough realize such a high data-rate, so channel-bonding capability strongly demanded extend as well 64-QAM support, achieving 42.24Gb/s. To 4-channel bonding...
This article presents a 60-GHz CMOS transceiver designed for IEEE 802.11ay. To reduce the manufacturing cost, an area-efficient bidirectional technique is utilized in this work. The proposed amplifier allows sharing of interstage passive components. A five-stage power-amplifier (PA)-low-noise-amplifier (PA-LNA) based on occupies less than half on-chip area, while staying similar performance with conventional standalone PA-LNA. Considering multiple-in-multiple-out (MIMO) configuration, work...
The research of 60GHz CMOS transceivers has bloomed due to their capability achieving low-cost multi-Gb/s short-range wireless communications [1]. Considering practical use the transceivers, longer operation lifetime with high output power is preferred provide reliable products. Unfortunately, as indicated in [2], transmitter will gradually degrade hot-carrier-injection (HCI) effects standard transistors at large-signal (e.g. amplifiers). It because inherently large voltage swing amplifiers...
This paper presents a digitally-calibrated 60-GHz direct-conversion transceiver. To improve the error vector magnitude (EVM) performance over wide bandwidth, digital calibration technique is applied. The transceiver implemented by 65 nm CMOS achieves maximum data rates of 20 Gb/s in 16QAM mode. transmitter and receiver consume 351 mW 238 from 1.2 V supply, respectively. As transceiver, best Tx-to-Rx EVM -26.2 dB achieved for 7Gb/s rate.
This paper proposes accurate CMOS device de-embedding and modeling methods. For millimeter-wave circuit design, simulation models are required. this reason, an measurement is a key technique for characterization, methods also very important. In work, three-parameter pad model based on L-2L method transistor with frequency bias dependency proposed. The derived from the assumption that capacitance of PADs becomes constant at high frequencies. modeling, parasitic elements extracted...
For millimeter-wave CMOS circuit design, accurate device models are necessary. Especially an de-embedding method is very important. Hence, precise deembedding of pad parasitics the first and valuable step to achieve models. In this work, a new modeling based on L-2L proposed. The model derived with assumption that characteristic impedance transmission line becomes constant at high frequency. Every used in amplifier characterized proposed method, simulation measurement results well agree each...
This paper presents 60-GHz CMOS transceivers aiming for the IEEE802.11ay standard, which are integrated with 4-channel bonding techniques. The can be classified into two categories: a 1-stream transceiver and 2-stream frequency-interleaved (FI) transceiver. both fabricated in standard 65-nm technology. achieves TX-to-RX EVM of -17dB transmit 28.16Gb/s 16QAM by using 4-bonded channel. front-end consumes 251mW 220mW from 1.2-V supply transmitting receiving mode, respectively. FI 42.24Gb/s...
A low-power and small-area 60-GHz CMOS transmitter with oscillator pulling mitigation is presented. The subharmonic injection locking technique for the suppression of effects analyzed demonstrated. fabricated in a 65nm process achieves 7.04-Gb/s data rate an EVM performance -25 dB 16QAM. whole consumes 210 mW from 1.2-V supply occupies core area 0.82 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> including PLL.
A 60 GHz antenna switching architecture is presented for millimeter-wave transceivers. This circuit topology re-uses the last stage’s transistor of power amplifier (PA) and first low-noise (LNA) as switches, matching blocks. two-stage LNA a PA are designed considering operation in 65 nm CMOS. The method has lower loss than conventional switches receiver mode. most important advantage no additional area penalty compared to methods. 2.9 dB minimum noise figure (NF) mode measured, 2 dBm OP1dB...
A 60GHz integrated antenna switching architecture is presented for millimeter-wave transceiver system. This circuit topology re-uses the last stage's transistor of power amplifier (PA) and first low-noise (LNA) as elements, matching blocks PA LNA. two-stage LNA a together switch fabricated on 65nm CMOS process. The method has lower loss than conventional quarter-wavelength based switches theoretically. are designed considering operation; hence there less area penalty when compared with...
This paper presents a 60-GHz direct-conversion transceiver in 65 nm CMOS technology. By the proposed gain peaking technique, this realizes good flatness and is capable of more than 7 Gbps 16QAM wireless communication for all channels IEEE802.11ad standard within EVM around -23 dB. The consumes 319mWin transmitting 223mW receiving, including PLL consumption.