A5017273263- Analog and Mixed-Signal Circuit Design
- Ultrasound Imaging and Elastography
- Advancements in Semiconductor Devices and Circuit Design
- Acoustic Wave Resonator Technologies
- Advanced MEMS and NEMS Technologies
- Semiconductor materials and devices
- Advanced Memory and Neural Computing
- Parallel Computing and Optimization Techniques
- Mechanical and Optical Resonators
- Low-power high-performance VLSI design
- Piezoelectric Actuators and Control
- Surface and Thin Film Phenomena
- Wireless Power Transfer Systems
- Radio Frequency Integrated Circuit Design
- Integrated Circuits and Semiconductor Failure Analysis
- Electrostatic Discharge in Electronics
- Sensor Technology and Measurement Systems
- Molecular Junctions and Nanostructures
- Ultrasonics and Acoustic Wave Propagation
- Advanced ceramic materials synthesis
- 3D IC and TSV technologies
- CCD and CMOS Imaging Sensors
- Advanced materials and composites
- Force Microscopy Techniques and Applications
- High-Temperature Coating Behaviors
University of Utah
2022
The University of Texas at Austin
2022
University of California, San Diego
2022
Nagoya University
2022
Texas Instruments (United States)
2022
University of Notre Dame
2022
Zhejiang University
2022
Cornell University
2022
University of Washington
2022
Washington University in St. Louis
2022
This paper describes for the first time observation of threshold voltage (Vth) fluctuation due to random telegraph signal (RTS) in flash memory. We acquired large-scale data Vth and confirm existence tail bits generated by RTS. The amount broadening becomes larger as scaling advances, reaches more than 0.3 V 45-nm node. Thus RTS prominent issue design multilevel memory node beyond
Threshold-voltage (Vth) fluctuation due to random telegraph signal (RTS) in flash memory was observed for the first time. A large amount of data Vth acquired by using a 90-nm-node array, and it confirmed that few cells have RTS exceeding 0.2 V. It found program-and-erase cycles increase amplitude memory. also simulation measurement tail-bits are generated multilevel operation. The broadening estimated become larger as scaling advances reaches more than 0.3 V 45-nm node. These results thus...
This paper presents a single-chip 3072-elementchannel (ECh) transceiver/128-subarray-channel (SCh) 2-D array IC with analog receiver (RX) and all-digital transmitter (TX) beamformer for echocardiography. The proposed integrates 3072-ECh transceivers that are composed of low-power tunable amplitude three-level pulser (TA3LP), zero-power-TX-and-RXisolation switch (ZTRSW), programmable gain-and-inputimpedance low-noise amplifier (PGZLNA), bidirectional dynamically reconfigurable...
A diagnostic ultrasound (US) system transmits acoustic waves at several to tens of MHz into the human body for clinical purposes and detects reflected observe internal organs without having a medical operation or radiation exposure. The is composed main unit probe connected via coaxial cables. very small because technicians laboriously grab manipulate it long time. To avoid image obscurity depending on technicians, high-speed high-resolution 3D/4D imaging necessary. For this reason,...
We propose a novel 300 MHz embedded flash memory for dual-core microcontrollers targeting shared ROM architecture. One of the features is three-stage pipeline read operation, which enables reduced access pitch and therefore performance penalty due to conflict. The second feature highly sensitive sense amplifier that achieves efficient operation with two-cycle latency one-cycle because shortened time 0.63 ns. combination architecture proposed amplifiers significant reduction in...
This article presents an area- and power-efficient transmission/receiving (TX/RX)-isolation switch implemented in a 3072-ch ultrasound (US) in-probe 2-D array transceiver application-specific integrated circuit (ASIC) for real-time 3-D imaging. Conventional T/R switches that protect low voltage (LV) receivers from high (HV) bipolar pulses require at least four HV-MOSFETs. The proposed dynamic gate–source shunt topology, which utilizes negative-HV-transmit-driven switch, eliminates...
We report on a new design approach for X-Y symmetric resonator, that can be mechanized as rate (RG) or rate-integrating gyroscope (RIG), with single digit as-fabricated frequency split between the two mechanical out-of-phase operational modes. explore concentration of critical elements (shuttle-spring-anchor modules) close to center die mitigate effect fabrication tolerances "intra-device". Characterization results show sub-Hz Δf=0.3Hz, lowest value found in literature silicon MEMS...
This paper presents an area- and power-efficient TX/RX-isolation switch implemented in a 3072-ch ultrasound transceiver IC. The proposed dynamic gate-source shunt topology, which utilizes negative-HV-transmit-driven switch, eliminates power-hungry HV level shifters ensures OFF during TX periods. In addition, source-driven HV-PMOS for ON/OFF control enables both gate charging discharging using single HV-PMOS, thus contributing to area reduction. Moreover, by preparing attenuation mode,...
A novel 300MHz embedded flash memory for dual-core microcontrollers with a shared ROM architecture is proposed. One of its features three-stage pipeline read operation, which enables reduced access pitch and therefore reduces performance penalty due to conflict accesses. Another feature highly sensitive sense amplifier that achieves efficient operation two-cycle latency one-cycle as result shortened time 0.63ns. The combination the proposed amplifiers significantly access-conflict penalties...
3D ultrasound imagers require low-noise amplifier (LNA) with much lower power consumption and smaller chip area than conventional 2D because of the huge amount transducer channels. This paper presents a low-power small-size LNA novel current-reuse circuitry for imaging systems. The proposed is composed differential common source source-follower driver which share current without using inductors. was fabricated in 0.18-μm CMOS process only 0.0056mm2. measured results show gain 21dB bandwidth...
A design methodology optimizing constant-charge-injection programming (CCIP) for assist-gate (AG)-AND flash memories is proposed. Transient circuit simulations using an array-level model including lucky electron (LEM) current source describing hot physics enables a concept over the whole memory-string in advance of wafer manufacturing. The dynamic behaviors various CCIP sequences, obtained by verified with measurement results 90-nm AG-AND memory, and we confirmed that simulation sufficiently...