Koji Inoue

ORCID: 0000-0003-3926-0646
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About
Contact & Profiles
Research Areas
  • Parallel Computing and Optimization Techniques
  • Interconnection Networks and Systems
  • Embedded Systems Design Techniques
  • Advanced Data Storage Technologies
  • Semiconductor materials and devices
  • Low-power high-performance VLSI design
  • Advancements in Semiconductor Devices and Circuit Design
  • Software Engineering Research
  • Quantum and electron transport phenomena
  • GaN-based semiconductor devices and materials
  • Physics of Superconductivity and Magnetism
  • Quantum Computing Algorithms and Architecture
  • Semiconductor Quantum Structures and Devices
  • Software Testing and Debugging Techniques
  • Distributed and Parallel Computing Systems
  • Optical Network Technologies
  • Software Engineering Techniques and Practices
  • Advanced Software Engineering Methodologies
  • Software Reliability and Analysis Research
  • Integrated Circuits and Semiconductor Failure Analysis
  • Photonic and Optical Devices
  • Cloud Computing and Resource Management
  • Silicon and Solar Cell Technologies
  • Radiation Effects in Electronics
  • Caching and Content Delivery

Kyushu University
2015-2024

Egypt-Japan University of Science and Technology
2024

Tohoku University
2024

Nagoya University
2021

Doshisha University
2003-2019

Fukuoka University
2001-2018

Machine Intelligence Research Institute
2017

Kyoto University
2016

Yokohama National University
2012-2014

Nagoya Institute of Technology
2014

A code clone is a portion in source files that identical or similar to another. Since clones are believed reduce the maintainability of software, several detection techniques and tools have been proposed. This paper proposes new technique, which consists transformation input text token-by-token comparison. For its implementation with useful optimization techniques, we developed tool, named CCFinder (Code Clone Finder), extracts C, C++, Java, COBOL other files. In addition, metrics for...

10.1109/tse.2002.1019480 article EN IEEE Transactions on Software Engineering 2002-07-01

In the emerging Internet of things cyber-physical system-embedded society, big data analytics needs huge computing capability with better energy efficiency. Coming to end Moore’s law electronic integrated circuit and facing throughput limitation in parallel processing governed by Amdahl’s law, there is a strong motivation behind exploring novel frontier post-Moore era. Optical fiber transmissions have been making remarkable advance over last three decades. A record aggregated transmission...

10.1063/1.5108912 article EN cc-by APL Photonics 2019-09-01

Article Free Access Share on Way-predicting set-associative cache for high performance and low energy consumption Authors: Koji Inoue Department of Computer Science Communication Engineering Kyushu University, 6-1 Kasuga-Koen, Kasuga, Fukuoka 816-8580 JAPAN JAPANView Profile , Tohru Ishihara Kazuaki Murakami Authors Info & Claims ISLPED '99: Proceedings the 1999 international symposium Low power electronics designAugust Pages 273–275https://doi.org/10.1145/313817.313948Online:17 August...

10.1145/313817.313948 article EN 1999-01-01

A key challenge in next-generation supercomputing is to effectively schedule limited power resources. Modern processors suffer from increasingly large variations due the chip manufacturing process. These lead inhomogeneity current systems and manifest into performance constrained environments, drastically limiting performance. We present a first-of-its-kind study on variability four production HPC spanning microarchitectures, analyze its impact applications, propose novel variation-aware...

10.1145/2807591.2807638 article EN 2015-10-27

Collections of already developed programs are important resources for efficient development reliable software systems. In this paper, we propose a novel graph-representation model component library (repository), called rank model. This is based on analyzing actual usage relations the components and propagating significance through relations. Using model, have Java class retrieval system named SPARS-J applied to various collections files. The result shows that gives higher used more...

10.1109/tse.2005.38 article EN IEEE Transactions on Software Engineering 2005-03-01

Graphics processing units (GPUs) provide an order-of-magnitude improvement on peak performance and performance-per-watt as compared to traditional multicore CPUs. However, GPU-accelerated systems currently lack a generalized method of power prediction, which prevents system designers from ultimate goal dynamic optimization. This is due the fact that their characteristics are not well captured across architectures, result, existing modeling approaches only available for limited range...

10.1109/ipdps.2014.23 article EN 2014-05-01

We optimized the circuit parameters of a low-power adiabatic quantum-flux-parametron (AQFP) gate in terms both bit energy and bias margin confirmed that with rise time 200 ps can be decreased to 6% <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">I</i> <sub xmlns:xlink="http://www.w3.org/1999/xlink">c</sub> Φ xmlns:xlink="http://www.w3.org/1999/xlink">0</sub> , where is critical current Josephson junctions single flux quantum. In addition, we...

10.1109/tasc.2012.2232336 article EN IEEE Transactions on Applied Superconductivity 2012-12-06

Maintaining software systems is becoming a more complex and difficult task, as the scale becomes larger. It generally said that code cloning one of factors make maintenance difficult. A clone portion in source files identical or similar to another. If some faults are found clone, it necessary correct its all clones. However for large software, very them completely. We develop support environment, called Gemini, which visualizes information from detection tool, CCFinder. Using we can specify...

10.1109/metric.2002.1011326 article EN 2003-06-25

Function point analysis (FPA) was originally proposed to help measure the size of a computerized business information system. It is now widely used in actual software development. However, it has been reported that, since function counting involves judgment on part counter, some differences would be caused between copies same product, even within organization. In this paper, we propose detailed FPA measurement rules for design specifications based UML (Unified Modeling Language) and develop...

10.1109/metric.1999.809727 article EN 2003-01-20

Superconductor single-flux-quantum (SFQ) logic family has been recognized as a highly promising solution for the post-Moore's era, thanks to its ultra-fast and low-power switching characteristics. Therefore, researchers have made tremendous amount of effort in various aspects promote technology automate circuit design process (e.g., low-cost fabrication, tool development). However, there no progress designing convincing SFQ-based architectural unit due architects' lack understanding...

10.1109/micro50266.2020.00018 article EN 2020-10-01

A multiplier based on superconductor single-flux-quantum (SFQ) logic is demonstrated up to 48GHz with the measured power consumption of 5.6 mW. The performs 8 × 8-bit signed multiplication every clock cycle. design a bit-parallel, gate-level-pipelined structure that exploits ultimately high-throughput performance SFQ logic. test chip fabricated using 1.0-μm, 9-layer process consists 20,251 Nb/AlOx/Nb Josephson junctions (JJs). correctness operation verified by on-chip high-speed testing.

10.1109/isscc.2019.8662351 article EN 2022 IEEE International Solid- State Circuits Conference (ISSCC) 2019-02-01

The superconductor single-flux-quantum (SFQ) logic family has been recognized as a promising solution for the post-Moore era, thanks to ultrafast and low-power switching characteristics of devices. Researchers have made tremendous efforts in various aspects, especially device circuit design. However, there little progress designing convincing SFQ-based architectural unit due lack understanding about its potentials limitations at level. This article provides design principles units with an...

10.1109/mm.2021.3070488 article EN cc-by IEEE Micro 2021-04-05

A high-power single-pole double throw (SPDT) switch IC using AlGaN/GaN heterojunction field-effect transistors (HFETs) is demonstrated for the first time. The reduction of on-resistance (R/sub on/) and off-capacitance (C/sub off/) HFETs enables GaN-based that can be applied practical RF applications. novel Si-doping technique employed to reduce ohmic contact resistance, which successfully reduces R/sub on/. C/sub off/ on a sapphire substrate found smaller than SiC substrate, together with...

10.1109/ted.2005.851835 article EN IEEE Transactions on Electron Devices 2005-07-19

Open source communities typically use a software repository to archive various projects with their code, mailing list discussions, documentation, bug reports, and so forth. For example, SourceForge currently hosts over seventy thousand open systems. Because of the size rich information content, such repositories offer numerous opportunities for sharing among projects. one would like know set that are related or similar each other, project groups can collaborate share work. With thousands in...

10.1109/apsec.2004.69 article EN 2005-04-05

Multicore processors have been popular for years, and the industry is gradually shifting towards era of manycore processors. Single-thread performance microprocessors not growing at a historical rate, but existence number active processes in computer system continuing development multi-threaded applications benefit from core counts to sustain throughput. This trend brings us situation where parallel simultaneously being executed on single system. Since try maximize its throughput by...

10.1145/2370816.2370833 article EN 2012-09-19

We have been investigating an ultra-low-power adiabatic quantum-flux-parametron (AQFP) logic, the energy dissipation of which can be decreased by changing its potential slowly or adiabatically. In present study, we designed basic AQFP logic gates and 1-bit full adder, examined their operations through simulations experiments. The adder is composed 46 Josephson junctions, approximately one-quarter number junctions a using conventional rapid single-flux-quantum logic. measurement results...

10.1109/tasc.2012.2236133 article EN IEEE Transactions on Applied Superconductivity 2012-12-24

A Single-Flux-Quantum (SFQ) 4-bit throughput-oriented processor has successfully been demonstrated at up to 32 GHz with the measured power consumption of 6.5 mW. This is first implementation gate-level-pipelined processor, and it achieves 2.5 Tera-Operations Per Watt (TOPS/W) by circuit architectural optimizations.

10.1109/vlsicircuits18222.2020.9162826 article EN 2020-06-01

Collections of already developed programs are important resources for efficient development reliable software systems. In this paper, we propose a novel method ranking components, called Component Rank, based on analyzing actual use relations among the components and propagating significance through relations. We have component-rank computation system, applied it to various Java programs. The result is promising such that non-specific generic ranked high. Using Rank system as core part,...

10.1109/icse.2003.1201184 article EN 25th International Conference on Software Engineering, 2003. Proceedings. 2003-01-01

Limited power budgets will be one of the biggest challenges for deploying future exascale supercomputers. One promising ways to deal with this challenge is hardware over provisioning, that is, installing more resources than can fully powered under a given limit coupled software mechanisms steer limited where it needed most. Prior research has demonstrated viability approach, but could only rely on small-scale simulations stack. While such useful understand boundaries performance benefits...

10.1109/ipdps.2017.107 article EN 2022 IEEE International Parallel and Distributed Processing Symposium (IPDPS) 2017-05-01

High-performance soft processors in field-programmable gate arrays (FPGAs) have become increasingly important as recent large FPGA systems relied on to run many complex workloads, like a network software stack. An out-of-order (OoO) superscalar approach is good candidate improve performance such cases, evidenced from OoO hard processor studies. Recent studies revealed, however, that conventional components do not fit well an FPGA, and it thus carefully design for characteristics. Hence, we...

10.1109/icfpt47387.2019.00016 article EN 2019-12-01

It is generally accepted that a code clone one factor making software maintenance difficult. A portion in source files identical or similar to another. Clones are introduced because of various reasons such as reusing by 'copy-and-paste' and so on. Since developers usually modify the copied-and-pasted portions, there gaps between them original portion. We call portions including gapped clones. Several detection methods, which consider gaps, have been proposed. However, it costly detect all...

10.1109/apsec.2002.1183002 article EN 2003-06-26

Use case point (UCP) method has been proposed to estimate software development effort in early phase of project and used a lot organizations. Intuitively, UCP is measured by counting the number actors transactions included use models. Several tools support calculating have developed. However, they only extract cases complexity classification them are conducted manually. We introducing projects Hitachi Systems & Services, Ltd. To effective introduction method, we developed an automatic...

10.1109/metrics.2004.21 article EN IEEE International Software Metrics Symposium 2004-09-11
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