A5030740879- Analog and Mixed-Signal Circuit Design
- Advancements in PLL and VCO Technologies
- Neuroscience and Neural Engineering
- Semiconductor materials and devices
- Radio Frequency Integrated Circuit Design
- CCD and CMOS Imaging Sensors
- Wireless Power Transfer Systems
- Neural Networks and Applications
- Advanced Memory and Neural Computing
- Sensor Technology and Measurement Systems
- Corporate Insolvency and Governance
- Energy Harvesting in Wireless Networks
- Wireless Body Area Networks
- Ferroelectric and Negative Capacitance Devices
- Advanced Frequency and Time Standards
- Magnetic Field Sensors Techniques
- EEG and Brain-Computer Interfaces
Korea Advanced Institute of Science and Technology
2021-2025
This paper presents a PVT-robust error-feedback (EF) noise-shaping SAR (NS-SAR) ADC for direct neural-signal recording. For closed-loop bidirectional neural interfaces enabling the next generation neurological devices, wide-dynamic-range recording circuit is required to accommodate stimulation artifacts. A structure using an NS-SAR can be good candidate because high resolution and wide dynamic range obtained with low oversampling ratio power consumption. However, ADCs require additional gain...
This paper presents a wide-dynamic-range, DC-coupled, time-based neural-recording integrated circuit (IC), which is resilient against stimulation artifacts, for bidirectional neural interfaces. The proposed IC based on delta-sigma modulation consists of an input Gm cell, current-controlled oscillator (CCO)-based integrator, phase quantizer, and tri-level current-steering DACs. feedback DACs embedded in the current sources cell enable recording to achieve wide enough dynamic range directly...
As a low-cost, small-sized alternative to crystal oscillators, RC oscillators have emerged and are used for on-chip reference clocks [1–3] time-based sensor nodes [4]. Since these types of operate with the time period defined by an constant, it is inherently advantageous in frequency stability, energy efficiency, jitter. These utilize predefined voltage level convert charging/discharging waveform into its output time-domain clock. this process, any added delay causes instability, circuit...
Sensor readout ICs for internet-of-things (IoT) systems require not only high energy efficiency and resolution but also a wide input range to cover variety of sensors with different output types characteristics [1], [2]. Readout methods based on delta-sigma modulation (DSM) [3], [4] two-step conversion (successive approximation + time-domain (TD) DSM) [5] have been proposed achieve efficiency, these structures suffer from limited ranges as they convert the sensor voltage, whose is strictly...
대상판결은 민사집행법상의 불복수단인 배당표에 대한 이의 절차를 거치지 않은 채권자가 실체법 또는 민사집행법상 규정에 비추어 부당하게 과다한 배당을 받은 제3자를 상대로 민법상 부당이득반환청구권을 행사할 수 있는지를 검토한다. 배당금을 과다수령한 부당이득반환청구를 할 있는지 여부는 실체법상의 권리관계 실현을 목적으로 하는 민사집행절차가 역으로 권리관계에 영향을 미치는지 여부에 관한 논의로 볼 있다.BR 대상판결의 다수의견은 종전 대법원 판례의 견해를 유지하여 이의를 하지 있다는 입장을 유지하였다. 이에 반하여 반대의견은 원칙적으로 이의절차를 통하지 않고 배당표가 확정되면 이후 없다는 제시하였다.BR 관해 학설은 크게 긍정하는 긍정설, 이를 부정하는 부정설 및 일반채권자의 경우 부정하고 근저당권자의 절충설이 대립하고 부당이득반환청구의 요건을 충족하였는지 관하여 검토해보면, ① 다른 채권자에게는 위 수령할 법률상 원인이 있다고 없고, ② 확정되지 않더라도 채권자에게 정당한 배당액을...
We present a 67-pJ/bit 435-MHz modulator for 16 quadrature amplitude modulation with fast and low- energy start-up ultra-low-power wireless medical capsule endoscopy application. For start-up, an auto-calibrated transient DC error correction is proposed to minimize the envelope at output node occurring right after initiation of process. Once optimized through calibration procedure, 50 pJ time 18 ns are achieved, which enable symbol-level duty cycling. Implemented in 180-nm CMOS process,...