Ismail Madaci

ORCID: 0000-0003-4698-0086
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About
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Research Areas
  • ZnO doping and properties
  • Ga2O3 and related materials
  • Advancements in Semiconductor Devices and Circuit Design
  • Magnetic Properties and Synthesis of Ferrites
  • Integrated Circuits and Semiconductor Failure Analysis
  • Semiconductor materials and interfaces
  • Electronic and Structural Properties of Oxides
  • Advanced Photocatalysis Techniques
  • Silicon and Solar Cell Technologies
  • 3D IC and TSV technologies
  • Magnetic properties of thin films
  • Copper-based nanomaterials and applications
  • Nanowire Synthesis and Applications
  • Microwave Dielectric Ceramics Synthesis
  • Conducting polymers and applications

Groupe d’Étude de la Matière Condensée
2019-2024

Université de Versailles Saint-Quentin-en-Yvelines
2019-2024

Université Paris-Saclay
2019-2024

Centre National de la Recherche Scientifique
2020-2024

Université Côte d'Azur
2024

The family of spinel compounds is a large and important class multifunctional materials general formulation AB2X4 with many advanced applications in energy optoelectronic areas such as fuel cells, batteries, catalysis, photonics, spintronics, thermoelectricity. In this work, it demonstrated that the ternary ultrawide-band-gap (∼5 eV) zinc gallate (ZnGa2O4) arguably native p-type oxide semiconductor largest Eg value (in comparison recently discovered binary monoclinic β-Ga2O3 oxide). For...

10.1021/acs.cgd.9b01669 article EN Crystal Growth & Design 2020-03-06

Strongly compensated Ga<sub>2</sub>O<sub>3</sub> is shown to be an intrinsic (or native) p-type conductor with the largest bandgap for any reported transparent semiconductor oxide which may shift frontiers in fields such as power electronics and photonics.

10.1039/c9tc02910a article EN Journal of Materials Chemistry C 2019-01-01

Abstract The spinel zinc gallate ZnGa 2 O 4 stands out among the emerging ultra-wide bandgap (∼5 eV) semiconductors as ternary complex oxide with widest gap where bipolar conductivity has been demonstrated. For power and energy electronics, a fundamental property of material is its critical electric field ( <?CDATA ${E_{{\text{CR}}}}$?> <mml:math xmlns:mml="http://www.w3.org/1998/Math/MathML" overflow="scroll"> <mml:mrow> <mml:msub> <mml:mi>E</mml:mi> <mml:mtext>CR</mml:mtext> </mml:mrow>...

10.1088/1361-6463/acbb14 article EN Journal of Physics D Applied Physics 2023-02-10

Low resistivity materials are required for advanced MOS or equivalent technologies. High boron in-situ doped Si epitaxy is known to create defects that increase the resistivity. Boron delta-doping (Si:B alternating with saturation layers) a potential solution overcome this limitation. Using process at 750 °C in Reduced Pressure Chemical Vapor Deposition reactor, two times lower than without (8.9x10 -4 Ω.cm and 1.86x10 -3 respectively) was achieved. SIMS characterization measured total...

10.1149/11402.0241ecst article EN ECS Transactions 2024-09-27

To reach the electrical performance of advanced CMOS technology, source and drain contact resistance becomes a key figure merit. By reducing size devices, minimum active carrier concentration required to obtain sufficiently low high-performance increases. However, incorporation dopants by Reduced Pressure-Chemical Vapor Deposition (RP-CVD) is limited &lt;10 20 at/cm 3 (substitutional atoms). For high B 2 H 6 flow ratio (F[B ]/F[H ] 7.1x10 -06 at 750 °C, 10 torr), material either forms...

10.1149/ma2024-02322354mtgabs article EN Meeting abstracts/Meeting abstracts (Electrochemical Society. CD-ROM) 2024-11-22

The fabrication of Ge strained (and/or relaxed) layers or nanolayers embedded in an oxide layer has attracted a great deal attention for various applications such as photodetectors, resonant tunneling devices, transistors, etc. In this work, the integration fully relaxed Ge-on-insulator (GOI) with silicon was demonstrated by using combination epitaxy / patterning and condensation. Arrays nanoscales patterns featuring ultra-thin (3-4 nm) GOI high crystalline quality, shapes rectangular strips...

10.1149/ma2024-02322288mtgabs article EN Meeting abstracts/Meeting abstracts (Electrochemical Society. CD-ROM) 2024-11-22

The development of thick pseudo-substrate SiGe usually involves a complex epitaxy several microns gradual buffer layer. However, drawback this approach relies on high roughness the top layer which implies addition subsequent planarization step. Furthermore, if part is relaxed and defect free, abundant dislocations are embedded deep. They can expand during following thermal processes, possibly reaching surface. Obviously, these defects detrimental for electronic photonic purposes. State art...

10.1149/ma2024-02322289mtgabs article EN Meeting abstracts/Meeting abstracts (Electrochemical Society. CD-ROM) 2024-11-22
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