A5043863217- Parallel Computing and Optimization Techniques
- CCD and CMOS Imaging Sensors
- Advanced Data Storage Technologies
- Embedded Systems Design Techniques
- Astronomy and Astrophysical Research
- Spacecraft Design and Technology
- Advancements in Semiconductor Devices and Circuit Design
- Experimental Learning in Engineering
- Low-power high-performance VLSI design
- Interconnection Networks and Systems
- Advanced Vision and Imaging
- Distributed systems and fault tolerance
- Embedded Systems and FPGA Applications
- Analog and Mixed-Signal Circuit Design
- Calibration and Measurement Techniques
- Image Enhancement Techniques
- Engineering Education and Pedagogy
- VLSI and Analog Circuit Testing
- Electromagnetic Compatibility and Noise Suppression
- Quantum-Dot Cellular Automata
- Stellar, planetary, and galactic studies
- Space Satellite Systems and Control
- Inertial Sensor and Navigation
- Adaptive optics and wavefront sensing
- Neuroscience and Neural Engineering
Rochester Institute of Technology
2013-2024
Community College of Philadelphia
2024
Washington State University
2010
An educational software platform has been developed to introduce students the design and operation of neural networks.The consists a graphical user interface (GUI) written in C# where network parameters can be applied construction network.Currently, manage fully-connected three-layer that recognizes handwritten digits MNIST database function as an tool computing concepts.The GUI allows specify number neurons various layers, select from 3 different activation functions well other...
Most image processing algorithms are parallelizable, i.e. the calculation of one pixel does not affect another one. SIMD architectures, including Intel's WMMX and SSE ARM's NEON, can exploit this fact by multiple pixels at a time, which result in significant speedups. This study investigates use NEON instructions for two algorithms. The latter altered to process four theoretical speedup factor be achieved. In addition, parts original implementation have been replaced with inline functions or...
Abstract NOTE: The first page of text has been automatically extracted and included below in lieu an abstract Development Integrated Project Tracks for a College-Wide Multidisciplinary Engineering Design Program at RIT Since 2002, the Kate Gleason College (KGCOE) Rochester Institute Technology (RIT) seen its Senior (MSD) program grow from small pilot project into college-wide initiative involving four departments almost 400 students annually. While subtle adjustments have made each year,...
Cache management is important in exploiting locality and reducing data movement. This article studies a new type of programmable cache called the lease cache. By assigning leases, software exerts primary control on when how long stays Previous work has shown an optimal solution for ideal develops evaluates set practical solutions physical emulated FPGA with full suite PolyBench benchmarks. Compared to automatic caching, programming can further reduce movement by 10% over 60% size 16 times...
Traditional caching is transparent to software but cannot utilize program information directly. With Moore's Law ending and general-purpose processor speed plateauing, there increasing importance interest in specialization including the interaction between cache.
The extragalactic background light (EBL) is the integrated emission from all objects outside of Milky Way galaxy. Imprinted by history stellar emission, EBL in near infrared traces back to birth first stars Universe and can allow tight constraints on structure formation models. Recent studies using data Spitzer Space Telescope Cosmic Infrared Background ExpeRiment (CIBER-1) find that there are excess fluctuations large scales which have been attributed either high redshift galaxies quasars,...
Field Programmable Gate Arrays (FPGAs) have become a competitive alternative to ASICs in both cost and flexibility. This paper presents method for migrating an existing ASIC core into FPGA. To minimize timing effects from logic overhead FPGAs, reconfigurable multichannel framework is developed that achieves comparable computational performance the original ASIC. Run-time reconfiguration overlapped with processing, allowing greater application diversity. Implementations using color space...
The extragalactic background light (EBL) is the integrated diffuse emissions from unresolved stars, galaxies, and intergalactic matter along line of sight. EBL regarded as consisting stellar thus an important observational quantity for studying global star formation history throughout cosmic time. Intensity anisotropy in near-infrared measured by Cosmic Infrared Background ExpeRiment (CIBER), NASA's sounding rocket experiment, previous infrared satellites exceed predicted signal galaxy...
Power supply noise (PSN) coupling represents a challenge in the design of current and future analog mixed-signal circuits. This paper studies impact PSN on key circuit building block: voltage reference. A model representing amount frequency domain is developed verified through simulations. solution for increasing high rejection identified evaluated. Finally, effect technology scaling studied two successive CMOS processes.
The total integrated emission from galaxies, known as the Extragalactic Background Light (EBL), is an important observable for understanding history of star formation over universe. Spatial fluctuations in infrared EBL measured by Cosmic Infrared ExpeRiment (CIBER), Spitzer and AKARI exceed predicted signal galaxy clustering alone. CIBER-2 project seeks to extend CIBER observa- tions throughout near into optical, through measurements above Earth's atmosphere during a suborbital sounding...
Color image processing algorithms are first developed using a high-level mathematical modeling language. Current integrated development environments offer libraries of intrinsic functions, which on one hand enable faster development, but the other hide use fundamental operations. The latter have to be detailed for an efficient hardware and/or software physical implementation. Based experience accumulated in process implementing segmentation algorithm, this paper outlines design...
The speedup of color image processing algorithms remains high interest as resolutions continue to increase. Due the intrinsic massive data parallelism, techniques employed use multi-core processor systems or custom hardware. In former task is split in multiple threads at software level, allowing many sets be processed, there are available. latter concurrency limited only by size available hardware resources. Both have their advantages and disadvantages, been demonstrated isolation. However,...
Cosmic Infrared Background ExpeRiment-2 (CIBER-2) is an international project to make a rocket-borne measurement of the (CIB) using three HAWAII-2RG image sensors. Since rocket telemetry unable downlink all data in real time, we adopt onboard storage board for each sensor electronics. In this presentation, development and Ground Station Electronics (GSE) system CIBER2 are described. We have fabricated, integrated, tested systems confirmed that work as expected, ready flight.
Abstract NOTE: The first page of text has been automatically extracted and included below in lieu an abstract A Two Course Sequence Computer Engineering Principles for Electrical Students Traditionally computer architecture courses emphasize either a programmer’s or logic designer’s perspective with regard to engineering. Recognizing the value both approaches, sequence two mandatory developed that addresses these aspects engineering curriculum at Rochester Institute Technology. lectures each...
This paper proposes a massively parallel computer architecture appropriate for implementation in late and post silicon technologies. These technologies promise to integrate more than billion components on chip or other substrates, but of which some may fail temporarily permanently. In the proposed architecture, programs data are organized entities that created, exist, move, adapt, share sea atomic processors. If component failures render one processors not functional, functional integrity...
Dynamic Partial Reconfiguration allows parts of a Field Programmable Gate Array to be reconfigured, while the rest system continues uninterrupted operation. A Color Space Conversion Engine is digital image-processing pipeline, which requires frequent reconfiguration some, but not all its stages. Therefore, it signal processing that presumably can take advantage dynamic partial reconfiguration. This paper describes necessary design changes, testing, and performance analysis color space...
Mobility-centric design revolves around the concept of a lease, which is used by hardware to manage cache memory and software program hardware. This position paper presents collaborative programming multicore hierarchy. first allow any mix policies on same machine. It promises more powerful optimization than what possible with existing designs but also introduces problem multi-level programming.