A low‐power 63‐GHz CMOS direct injection‐locked frequency divider in 0.13‐μm CMOS technology

• DOI: 10.1002/mop.23768
• Publication Date: 2008-07-26T04:57:50Z
• Authors: Wei‐Lun Hsu; Chang‐Zhi Chen; Yo‐Sheng Lin
• Keywords: 0202 electrical engineering, electronic engineering, information engineering; 02 engineering and technology; 7. Clean energy

Abstract A low‐power 63‐GHz (V‐band) direct injection‐locked frequency‐divider (ILFD) using standard 0.13‐μm CMOS technology is reported. To reduce power consumption and enhance locking range, a PMOS switch directly coupled to the LC tank (output) of ILFD used replace traditional tail transistor for injection path. This architecture also features very low input capacitance; thus, high operating frequency 63 GHz can be achieved. consumes 5.79 mW with range 1.86 (61.24–63.1 GHz). The chip area was only 0.585 × 0.38 mm 2 excluding test pads. © 2008 Wiley Periodicals, Inc. Microwave Opt Technol Lett 50: 2581–2584, 2008; Published online in InterScience (www.interscience.wiley.com). DOI 10.1002/mop.23768