A low-complexity algorithm for fast acquisition of weak DSSS signal in high dynamic environment
0202 electrical engineering, electronic engineering, information engineering
02 engineering and technology
DOI:
10.1007/s10291-017-0620-y
Publication Date:
2017-04-03T06:59:15Z
AUTHORS (4)
ABSTRACT
The initial acquisition of direct-sequence spread-spectrum (DSSS) signal transmitted in bursts by ground terminals at satellite-borne receiver poses an engineering challenge. We propose a low-complexity acquisition algorithm that is capable of capturing extremely weak DSSS signal in the presence of large Doppler dynamics. The algorithm uses fast Fourier transform (FFT)-based frequency-domain techniques to implement circular correlations between the received signal and the local pseudo-random noise (PRN) code, and it coherently accumulates the correlation results across multiple PRN code periods, to achieve a sufficient signal---noise ratio for reliable acquisition. We invoke another FFT procedure to perform the coherent accumulation and the fine compensation for the residual Doppler frequency offset. To highlight the advantage of the proposed algorithm, we make a complexity comparison among the proposed algorithm and two other benchmark strategies, namely the modified double block zero padding (MDBZP) and two-dimensional exhaustive search (2D-ES). It is shown that the proposed algorithm has the lowest complexity, which is particularly desirable for satellite-borne receivers where the computational resource is limited. The acquisition performance of the proposed algorithm is verified by theoretical analysis and Monte Carlo simulations and compared with that of MDBZP and 2D-ES. Moreover, we have carried out extensive tests on a hardware verification system, and we show the claimed tradeoff between performance and cost is indeed attainable with the suggested algorithm. Numerically, it is found the proposed algorithm can achieve a detection rate of 0.9 and a false alarm rate of $$10^{ - 5}$$10-5 at C/N0 = 29.5 dBHz over a Doppler frequency offset range of $$\left[ { - 7.5\,{\text{kHz}},7.5\,{\text{kHz}}} \right]$$-7.5kHz,7.5kHz in floating-point simulation, which coincides with the analytical results. The same performance is achieved at C/N0 = 31 dBHz in fixed-point simulation and at C/N0 = 31.5 dBHz on a hardware system.
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