The Characteristics of Seebeck Coefficient in Silicon Nanowires Manufactured by CMOS Compatible Process
Nanochemistry
Silicon nanowires
DOI:
10.1007/s11671-010-9690-2
Publication Date:
2010-07-17T10:52:21Z
AUTHORS (6)
ABSTRACT
Silicon nanowires are patterned down to 30 nm using complementary metal-oxide-semiconductor (CMOS) compatible process. The electrical conductivities of n-/p-leg extracted with the variation width. Using this structure, Seebeck coefficients measured. obtained maximum coefficient values 122 μV/K for p-leg and -94 n-leg. attainable power factor is 0.74 mW/m K(2) at room temperature.
SUPPLEMENTAL MATERIAL
Coming soon ....
REFERENCES (11)
CITATIONS (14)
EXTERNAL LINKS
PlumX Metrics
RECOMMENDATIONS
FAIR ASSESSMENT
Coming soon ....
JUPYTER LAB
Coming soon ....