SECDA-TFLite: A toolkit for efficient development of FPGA-based DNN accelerators for edge inference

• DOI: 10.1016/j.jpdc.2022.11.005
• Publication Date: 2022-11-16T02:25:55Z
• Authors: Jude Haris; Perry Gibson; José Cano; Nicolas Bohm Agos...; David Kaeli
• Keywords: 0202 electrical engineering, electronic engineering, information engineering; 02 engineering and technology

In this paper we propose SECDA-TFLite, a new open source toolkit for developing DNN hardware accelerators integrated within the TFLite framework.The leverages principles of SECDA, hardware/software co-design methodology, to reduce design time optimized inference on edge devices with FPGAs.With initial setup costs associated integrating accelerator target framework, allowing developers focus design.SECDA-TFLite also includes modules cost-effective SystemC simulation, profiling, and AXI-based data communication.As case study, use SECDA-TFLite develop evaluate three designs across seven common CNN models two BERT-based against an ARM A9 CPU-only baseline, achieving average performance speedup up 3.4× 2.5× models.