1.8V–3GHz CMOS limiting amplifier with efficient frequency compensation

• DOI: 10.1016/j.microrel.2010.07.006
• Publication Date: 2010-08-03T09:24:49Z
• Authors: J.M. Garcia del Pozo; S. Celma; A. Otín; I. Lope; J. Urdangarín
• Keywords: 0202 electrical engineering, electronic engineering, information engineering; 02 engineering and technology; 7. Clean energy

Abstract A compact robust CMOS limiting amplifier (LA) for high data traffic optical links is presented in this work. The core considers two different blocks. First, four common-source inverter amplifiers are included, which optimize the gain-bandwidth product of the structure. And second, two additional compensation stages are placed strategically between the gain stages alleviating the pernicious load effect. These stages develop two different compensation techniques simultaneously thus increasing the bandwidth. The proposed design consumes 113 mW with a single 1.8 V supply. It achieves a cut-off frequency up to 3 GHz and provides a gain of 21 dB. The circuit is packaged in a QFN24 and mounted on a commercial FR4 PCB.