Efficient March test algorithm for 1T1R cross‐bar with complete fault coverage
0202 electrical engineering, electronic engineering, information engineering
02 engineering and technology
DOI:
10.1049/el.2016.1693
Publication Date:
2016-06-27T17:06:55Z
AUTHORS (6)
ABSTRACT
As an attractive option of future non‐volatile memories, resistive RAM (RRAM) has attracted more attentions. Among RRAM architectures, one transistor one memristor (1T1R) cross‐bar is the most fledged one. A March C*‐1T1R algorithm is proposed for 1T1R cross‐bar. The pass–fail fault dictionary of the proposed March test algorithm is analysed. Analytical results show that the proposed test algorithm can detect all the modelled faults caused by the parametric variation of memristors, transistors and their interconnecting wires with a little test time overhead compared with previous methods.
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