High-performance routers with multi-stage multi-layer switching and single-stage shared buffering

• DOI: 10.1049/iet-net.2011.0001
• Publication Date: 2012-12-23T18:01:20Z
• Authors: F. Wang; M. Hamdi; D. Lin
• Keywords: Packet Switching; Network switch; Weighted fair queueing

High-performance routers for next generation networks are required to scale with the increasing 'port number' due developments of various network access technologies. It has been common practice build scalable multi-stage multi-layer switches in circuit switching. For packet switches, however, researchers have so far had no consensus on how employ architecture. The underlying reason is that switching performance much affected by their buffering strategies. In single-stage crossbar routers, well-understood combined-input-output-queuing (CIOQ, at one extreme input queuing, other output queuing) rich and growing theories about its analysis. were not clear or whether it necessary introduce buffers into middle stages. this study, authors investigate problem propose buffer all packets central stage instead side. By making fully shared (in a distributed way), we show (MMS-SSB) 'scalable' terms only hardware cost, but efficient scheduling algorithms as well. addition, both analysis simulations MMS-SSB switch our proposed 'independent' outside traffic.