A multi-radix approach to asynchronous division

Radix (gastropod) Numerical digit
DOI: 10.1109/async.2001.914066 Publication Date: 2002-11-13T14:55:33Z
ABSTRACT
The speed of high-radix digit-recurrence dividers is mainly determined by the hardware complexity quotient-digit selection function. In this paper we present a scheme that combines area efficiency bundled data with data-dependent computation time. function very simple and may be implemented using fast adder This speculates result digit and, when speculation incorrect, correction quotient residual must performed. When satisfies some constraints it also possible to switch higher radix, computing fraction next in advance. results division variable iteration time number iterations hence an asynchronous behaviour Several designs were realized compared both terms execution area. fastest unit considered radix-64 divider radix 128 or 256. Our evaluations show /spl times/ delay savings from 25% 65%, equivalent synchronous designs, achieved.
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