A case for globally shared-medium on-chip interconnect

• DOI: 10.1145/2000064.2000097
• Publication Date: 2011-06-28T17:34:50Z
• Authors: Aaron Carpenter; Jianyun Hu; Jie Xu; Michael Huang; Hui Wu
• Keywords: Microprocessor

As microprocessor chips integrate a growing number of cores, the issue interconnection becomes more important for overall system performance and efficiency. Compared to traditional distributed shared-memory architecture, chip-multiprocessors offer different set design constraints opportunities. result, conventional packet-relay multiprocessor interconnect architecture is valid, but not necessarily optimal, point. For example, advantage off-the-shelf in-field scalability are less in chip-multiprocessor. On other hand, even with worsening wire delays,packet switching represents non-trivial component latency.