Design Automation and Test Solutions for Monolithic 3D ICs

Design for testing
DOI: 10.1145/3473462 Publication Date: 2021-11-16T21:56:59Z
ABSTRACT
Monolithic 3D (M3D) is an emerging heterogeneous integration technology that overcomes the limitations of conventional through-silicon-via (TSV) and provides significant performance uplift power reduction. However, ultra-dense interconnects impose challenges during physical design on how to best utilize them. Besides, unique low-temperature fabrication process M3D requires dedicated design-for-test mechanisms verify reliability chip. In this article, we provide in-depth analysis these test in M3D. We also a comprehensive survey state-of-the-art solutions presented literature. This article encompasses all key steps design, including partitioning, placement, clock routing, thermal optimization. addition, various fault mechanisms, manufacturing defects, delay faults, MIV (monolithic inter-tier via) faults. Our include pattern generation for pre/post-bond testing, built-in-self-test, access architectures targeting
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