RFAM: RESET-Failure-Aware-Model for HfO2-based Memristor to Enhance the Reliability of Neuromorphic Design

• DOI: 10.1145/3583781.3590211
• Publication Date: 2023-05-31T22:40:19Z
• Authors: Hritom Das; Manu Rathore; Rocco Febbo; Maximilian Liehr; Nathaniel C. Cady; Garrett S. Rose
• Keywords: Reset (finance); Neuromorphic engineering; Memristor; Spice

Memristors are a suitable candidate to design synapse circuits and neuromorphic systems. Due device voltage variability, operating memristive with reliability is big challenge. To enhance the of synapse, RESET failure needs be considered. In this work, we focused on modeling variation. Here, defined as hard due high being applied. The proposed Verilog-A model derived based experimental data collected from 1T1R devices, which fabricated 65 nm CMOS process. system-level simulation, will provide better guidelines designer. addition, power consumption for successful operation 7.065 μW at 1.5 V, can memristor resistance 5 kΩ 200 kΩ.