Bit-level scheduling of heterogeneous behavioural specifications

• DOI: 10.1145/774572.774661
• Publication Date: 2004-02-05T10:13:18Z
• Authors: M. C. Molina; J. M. Mendías; R. Hermida
• Keywords: High-Level Synthesis; Kernel (algebra)

This paper presents a heuristic scheduling algorithm for heterogeneous specifications, those formed by operations of different types and widths. The extracts the common operative kernel operations, binds afterwards to cycles with aim distributing uniformly number bits calculated per cycle. In consequence, may be fragmented executed during set non-necessarily consecutive cycles, over several linked simple hardware resources. proposed algorithm, in combination allocation algorithms able guarantee bit-level reuse resources, obtains considerably smaller datapaths than ones conventional synthesis algorithms. produced type, number, width resources are independent specification variables.