Nano-scaled Ge FinFETs with low temperature ferroelectric HfZrO<inf>x</inf> on specific interfacial layers exhibiting 65% S.S. reduction and improved I<inf>ON</inf>

• DOI: 10.23919/vlsit.2017.7998159
• Publication Date: 2017-08-09T16:18:06Z
• Authors: C.-J. Su; Y.-T Tang; Y.-C. Tsou; P.-J. Sung; F.-J. Hou; C.-J. Wang; S.-T. Chung; C.-Y. Hsieh; Y.-S. Yeh; F.-K. Hsueh; K.-H. Kao; S.-S. Chuang; C.-T. Wu; T.-Y. You; Y.-L. Jian; T.-H. Chou; Y.-L. Shen; B.-Y. Chen; G.-L. Luo; T.-C. Hong; K.-P. Huang; M.-C. Chen; Y.-J. Lee; T.-S. Chao; T.-Y. Tseng; W.-F. Wu; G.-W. Huang; J.-M. Shieh; W.-K. Yeh; Y.-H. Wang
• Keywords: 0103 physical sciences; 01 natural sciences

Ge n- and p-FinFETs with different interfacial layer ferroelectric HfZrO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> (IL-FE-HZO) gate stacks have been demonstrated systematically by various annealing conditions for the first time. Microwave (MWA) not only shows enhanced FE characteristics but also suppresses leakage interdiffusion compared conventional rapid thermal (RTA). While HZO on Al xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> IL results in paraelectric behavior, GeO exhibits significant FE. High I xmlns:xlink="http://www.w3.org/1999/xlink">on</sub> /I xmlns:xlink="http://www.w3.org/1999/xlink">off</sub> (> 107) low subthreshold slope (S.S. ~ 58 mV/dec.) are a nFinFET length (L xmlns:xlink="http://www.w3.org/1999/xlink">g</sub> ) of 60 nm FE-HZO/GeO stack.