ARCH-COMP 2021 Category Report: Falsification with Validation of Results

• DOI: 10.29007/xwl1
• Publication Date: 2021-12-06T23:10:07Z
• Authors: Gidon Ernst; Paolo Arcaini; Ismail Bennani; Aniruddh Chandratre; Alexandre Donzé; Georgios Fainekos; Goran Frehse; Khouloud Gaaloul; Jun Inoue; Tanmay Khandait; Logan Mathesen; Claudio Menghi; Giulia Pedrielli; Marc Pouzet; Masaki Waga; Shakiba Yaghoubi; Yoriyuki Yamagata; Zhenya Zhang
• Keywords: 0202 electrical engineering, electronic engineering, information engineering; 02 engineering and technology

This report presents the results from the 2021 friendly competition in the ARCH work- shop for the falsification of temporal logic specifications over Cyber-Physical Systems. We briefly describe the competition settings, which have been inherited from the previ- ous years, give background on the participating teams and tools and discuss the selected benchmarks. Apart from new requirements and participants, the major novelty in this instalment is that falsifying inputs have been validated independently. During this pro- cess, we uncovered several issues like configuration errors and computational discrepancies, stressing the importance of this kind of validation.