Anomalous PBTI Effects in N-Type Super Junction under High Gate Voltage Stress

• DOI: 10.3390/electronics11091362
• Publication Date: 2022-04-26T01:16:28Z
• Authors: Hua Tang; Hang Xu; Lin Chen; Hao Zhu; Qingqing Sun
• Keywords: Saturation current; Saturation (graph theory); Negative-bias temperature instability

In this work, an anomalous thick oxide-degradation phenomenon in n-type 650-V class super-junction VDMOS transistors is investigated. An unexpected threshold voltage (Vt) decrease was observed with high positive bias temperature instability stress, and the saturation current (IDsat) increases stress time. Repeatable reproducible behaviors have been achieved from multiple devices under test. Based on simulation experimental results, it found that high-energy electrons (caused by gate voltage) region at bottom of oxide layer (top N-pillar) are injected into oxide. The generate electron-hole pairs during transport to anode, leaving holes layer, thus decreased Vt increased IDsat. Finally, C-V measurement also carried out which further confirms above analysis.