AeneasHDC: An Automatic Framework for Deploying Hyperdimensional Computing Models on FPGAs

• DOI: 10.36227/techrxiv.171656291.17399753/v1
• Publication Date: 2024-05-24T15:02:05Z
• Authors: Marco Angioli; Saeid Jamili; Marcello Barbirotta; Abdallah Cheikh; Antonio Mastrandrea; Francesco Menichelli; Antonello Rosato; Mauro Olivieri

Hyperdimensional Computing (HDC) is a bioinspired learning paradigm, that models neural pattern activities using high-dimensional distributed representations.HDC leverages parallel and simple vector arithmetic operations to combine compare different concepts, enabling cognitive reasoning tasks.The computational efficiency parallelism of this approach make it particularly suited for hardware implementations, especially as lightweight, energy-efficient solution performing tasks on resource-constrained edge devices.The HDC pipeline, including encoding, training, comparison stages, has been extensively explored with various approaches in the literature.However, while these techniques are mainly oriented improve model accuracy, their influence parameters remains largely unexplored.This work presents AeneasHDC, an automatic open-source platform streamlined deployment both software classification, regression clustering tasks.AeneasHDC supports extensive range commonly adopted literature, automates design flexible accelerators HDC, empowers users easily assess impact choices memory usage, execution time, power consumption, area requirements.