scalable and efficient virtual memory sharing in heterogeneous socs with tlb prefetching and mmu aware dma engine

• DOI: 10.48550/arxiv.1808.09751
• Publication Date: 2018-10-01
• Authors: Andreas Kurth; Pirmin Vogel; Andrea Marongiu; Luca Benini
• Keywords: FOS: Computer and information sciences; Computer Science - Distributed, Parallel, and Cluster Computing; Hardware Architecture (cs.AR); 0103 physical sciences; Hardware Architecture; Distributed, Parallel, and Cluster Computing; 0202 electrical engineering, electronic engineering, information engineering; DMA Engine; Heterogeneous SoCs; Hybrid MMU; Many Core; Multi Core; Parallel Processing; Shared Virtual Memory; TLB Management; TLB Prefetching; Distributed, Parallel, and Cluster Computing (cs.DC); 02 engineering and technology; Computer Science - Hardware Architecture; 01 natural sciences

ISBN:978-1-5386-8478-8<br/>2018 IEEE 36th International Conference on Computer Design (ICCD)<br/>ISBN:978-1-5386-8477-1<br/>