SOI Transistor Model for Fast Transient Simulation

• DOI: 10.5555/996070.1009879
• Publication Date: 2003-11-09
• Authors: D. Nadezhin; S. V. Gavrilov; A. Glebov; Yu.B. Egorov; V. Zolotov; David Blaauw; R. Panda; M. Becer; A. Ardelea; Anuj Patel
• Keywords: Transistor model; Lookup table; Semiconductor device modeling

Progress in semiconductor process technology has made SOI transistors one of the most promising candidates for high performance and low power designs. With smaller diffusion capacitances, switch significantly faster than their traditional bulk MOS counterparts consume less per switching. However, design simulation circuits is more challenging due to complex behavior an transistor involving floating body effects, delay dependence on history switching, bipolar effect others. This paper devoted developing a fast table model transistors, suitable use level simulators. We propose using charge instead potential as independent variable improve convergence circuit integration algorithm. additional terminal compared with MOSFET hence requires larger tables model. novel transformation reduce number dimensions result make size reasonable. The also presents efficient implementation our piece-wise polynomial approximation, nonuniform grid discretization, splitting into its equilibrium non states. effectiveness proposed demonstrated by employing it simulator simulate industrial microprocessor circuits.