Enhancement-mode Ga2O3 MOSFETs with Si-ion-implanted source and drain

• DOI: 10.7567/apex.10.041101
• Publication Date: 2017-03-07T09:14:23Z
• Authors: Man Hoi Wong; Yoshiaki Nakata; Akito Kuramata; Shigenobu Yamakoshi; Masataka Higashiwaki
• Keywords: Equivalent series resistance; Drain-induced barrier lowering

Enhancement-mode β-Ga2O3 metal–oxide–semiconductor field-effect transistors with low series resistance were achieved by Si-ion implantation doping of the source/drain contacts and access regions. An unintentionally doped Ga2O3 channel background carrier concentration that was fully depleted at a gate bias 0 V gave rise to positive threshold voltage without additional constraints on dimensions or device architecture. Transistors length 4 µm delivered maximum drain current density (IDS) 1.4 mA/mm an IDS on/off ratio near 106. Nonidealities associated Al2O3 dielectric as well their impact enhancement-mode performance are discussed.