A5114860286- Interconnection Networks and Systems
- Parallel Computing and Optimization Techniques
- Educational Systems and Policies
- Education and Learning Interventions
- VLSI and Analog Circuit Testing
- Cloud Computing and Resource Management
- Educational Research and Pedagogy
- Network Packet Processing and Optimization
- Advanced Neural Network Applications
- Embedded Systems Design Techniques
- Advanced Data Storage Technologies
- Advanced Memory and Neural Computing
- CCD and CMOS Imaging Sensors
- Technology and Data Analysis
- Algorithms and Data Compression
- Internet of Things and Social Network Interactions
- Diverse Approaches in Healthcare and Education Studies
- Biometric Identification and Security
- Advanced Image and Video Retrieval Techniques
- Neural Networks and Applications
- Sports Analytics and Performance
- Advanced Text Analysis Techniques
- Integrated Circuits and Semiconductor Failure Analysis
- Digital Marketing and Social Media
- Distributed and Parallel Computing Systems
Korea Advanced Institute of Science and Technology
2007-2024
Myongji University
2024
Hanyang University
2024
SK Group (South Korea)
2022-2023
Kootenay Association for Science & Technology
2022
University of Georgia
2022
University of Delaware
2019
Yonsei University
2014-2018
Soongsil University
2017-2018
Microsoft Research (United Kingdom)
2014-2017
The metaverse has the potential to extend physical world using augmented and virtual reality technologies allowing users seamlessly interact within real simulated environments avatars holograms. Virtual immersive games (such as, Second Life, Fortnite, Roblox VRChat) have been described as antecedents of offer some insight socio-economic impact a fully functional persistent cross platform metaverse. Separating hype "meta…" rebranding from current is difficult, "big tech" paints picture...
Datacenter workloads demand high computational capabilities, flexibility, power efficiency, and low cost. It is challenging to improve all of these factors simultaneously. To advance datacenter capabilities beyond what commodity server designs can provide, we have designed built a composable, reconfigurablefabric accelerate portions large-scale software services. Each instantiation the fabric consists 6x8 2-D torus high-end Stratix V FPGAs embedded into half-rack 48 machines. One FPGA placed...
Datacenter workloads demand high computational capabilities, flexibility, power efficiency, and low cost. It is challenging to improve all of these factors simultaneously. To advance datacenter capabilities beyond what commodity server designs can provide, we have designed built a composable, reconfigurable fabric accelerate portions large-scale software services. Each instantiation the consists 6×8 2-D torus high-end Stratix V FPGAs embedded into half-rack 48 machines. One FPGA placed each...
Hyperscale datacenter providers have struggled to balance the growing need for specialized hardware (efficiency) with economic benefits of homogeneity (manageability). In this paper we propose a new cloud architecture that uses reconfigurable logic accelerate both network plane functions and applications. This Configurable Cloud places layer (FPGAs) between switches servers, enabling flows be programmably transformed at line rate, acceleration local applications running on server, FPGAs...
Hyperscale datacenter providers have struggled to balance the growing need for specialized hardware (efficiency) with economic benefits of homogeneity (manageability). In this paper we propose a new cloud architecture that uses reconfigurable logic accelerate both network plane functions and applications. This Configurable Cloud places layer (FPGAs) between switches servers, enabling flows be programmably transformed at line rate, acceleration local applications running on server, FPGAs...
Data compression techniques have been the subject of intense study over past several decades due to exponential increases in quantity data stored and transmitted by computer systems. Compression algorithms are traditionally forced make tradeoffs between throughput quality (the ratio original file size compressed size). FPGAs represent a compelling substrate for streaming applications such as thanks their capacity deep pipelines custom caching solutions. Unfortunately, hazards LZ77 inhibit...
To address the issue of powerful row hammer (RH) attacks, our study involved an extensive analysis prevalent attack patterns in field. We discovered a strong correlation between timing and density active-to-active command period, ${tRC}$, likelihood RH attacks. In this paper, we introduce MARC, innovative ARFM-driven mitigation IP that significantly reinforces existing IPs. MARC dynamically adjusts frequency RFM response to severity environment, offering tailored security solution not only...
Presents a collection of slides covering the following topics: FPGA; data center; deep learning; cloud specialization tradeoff; and convolutional neural network.
Datacenter workloads demand high computational capabilities, flexibility, power efficiency, and low cost. It is challenging to improve all of these factors simultaneously. To advance datacenter capabilities beyond what commodity server designs can provide, we designed built a composable, reconfigurable hardware fabric based on field programmable gate arrays (FPGA). Each in the contains one FPGA, FPGAs within 48-server rack are interconnected over low-latency, high-bandwidth network. We...
This paper describes real chip implementation issues of network-on-chip (NoC) and their solutions along with series design examples. The described in this cover both architectural aspects circuit level techniques for practical NoC. As architecture solutions, topology selection, chip-aware protocol design, on-chip serialization (OCS) link area reduction are explained. For techniques, SERDES synchronizer crossbar switch partial activation, low-voltage presented as the foundations power...
Hyperscale datacenter providers have struggled to balance the growing need for specialized hardware with economic benefits of homogeneity. The Configurable Cloud architecture introduces a layer reconfigurable logic (FPGAs) between network switches and servers. This enables line-rate transformation packets, acceleration local applications running on server, direct communication among FPGAs, at scale. low latency, ubiquitous deployment services spanning any number FPGAs be used shared quickly...
Memory capacity continues to increase, and many semiconductor manufacturing companies are trying stack memory dice for larger capacities. Therefore, built-in redundancy analysis (BIRA) is of utmost importance because the probability fault occurrence increases with a capacity. A traditional spare structure that consists simple rows columns somewhat inadequate multiple blocks BIRA hardware overhead allocation efficiency degraded. The proposed uses various types spares can achieve higher yield...
CXL interface is the up-to-date technology that enables effective memory expansion by providing a memory-sharing protocol in configuring heterogeneous devices. However, its limited physical bandwidth can be significant bottleneck for emerging data-intensive applications. In this work, we propose novel CXL-based disaggregation architecture with real-world prototype demonstration, which overcomes limitation of using near-data processing. The experimental results demonstrate our design achieves...
As data centers are increasingly focused on energy efficiency, it becomes important to develop low power implementations of the various applications that run them. Data compression plays a critical role in mitigate storage and communication costs. This work focuses building power, high performance implementation for canonical Huffman encoding. We number different hardware software targeting Xilinx Zynq FPGA, ARM Cortex-A9, Intel Core i7. Despite its sequential nature, we show our accelerated...
Purpose The purpose of this paper is to investigate the role geographic distance in crowdfunding. Design/methodology/approach Under assumption that investors are more likely be attracted local borrowers, investigates whether phenomenon because affinity or an informational advantage. authors define a investor as who from same US state borrower. Findings finds loans offered by have lower interest rates and default probability. In addition, when level investment highest, effects advantage...
Built-in redundancy analysis (BIRA) is widely used for memory yield improvement. However, increases in fault occurrence probability inevitably lead to the use of various spare lines achieve a high repair rate. Generally, it difficult apply conventional BIRAs memories with because they focus on simple structure. Therefore, this study examines BIRA that focuses The proposed achieves rate through lines. Although long time typically required due lines, solves problem sequential line allocation....
In this paper, we propose to extract global directional features of finger-knuckle-print based on difference image for identity verification. order simplify the formulation computational complexity reduction, proposed horizontal and vertical images are generated matrix projection operation. Subsequently, a Heaviside step function is adopted ternarization. Next, Fourier from these ternary by means two-dimensional discrete transform. Finally, matching between extracted performed an Euclidean...
A new low-power object-recognition processor achieves real-time robust recognition, satisfying modern mobile vision systems' requirements. The authors introduce an attention-based algorithm for energy efficiency, a heterogeneous multicore architecture data- and thread-level parallelism, network on chip high on-chip bandwidth. fabricated 30 frames/second throughput average 320 mW power consumption test 720p video sequences, yielding 640 GOPS/W 10.5 NJ/pixel efficiency.
Hyperscale datacenter providers have struggled to balance the growing need for specialized hardware with economic benefits of homogeneity. The Configurable Cloud architecture introduces a layer reconfigurable logic (FPGAs) between network switches and servers. This enables line-rate transformation packets, acceleration local applications running on server, direct communication among FPGAs, at scale. low latency, ubiquitous deployment services spanning any number FPGAs be used shared quickly...
It is important to test the memory and repair faults for improving yield. Many redundancy analysis (RA) algorithms have been developed faults. However, it difficult achieve high rate fast speed. The previous RA do not both To overcome this problem, a new algorithm called one side pivot (OSP) proposed. Using property of fault its priority, time find solution can be reduced. experimental results show that proposed efficient in terms
This paper proposes a real-time embedded fall detection system using DVS(Dynamic Vision Sensor) that has never been used for traditional detection, dataset that, and DVS-TN(DVS-Temporal Network). The first contribution is building DVS Falls Dataset, which made our network to recognize much greater variety of falls than the existing datasets existed before solved privacy issues DVS. Secondly, we introduce DVS-TN : optimized deep learning detect Finally, implemented can run on low-computing...