A5004481471- Distributed systems and fault tolerance
- Interconnection Networks and Systems
- Software-Defined Networks and 5G
- Cloud Computing and Resource Management
- Embedded Systems Design Techniques
- Parallel Computing and Optimization Techniques
- Distributed and Parallel Computing Systems
- Software Testing and Debugging Techniques
- Caching and Content Delivery
- Advanced Data Storage Technologies
- Software System Performance and Reliability
- VLSI and Analog Circuit Testing
- Real-Time Systems Scheduling
- Network Packet Processing and Optimization
- Advanced Memory and Neural Computing
- VLSI and FPGA Design Techniques
Intel (United States)
2024
Università della Svizzera italiana
2017-2021
Politecnico di Milano
2016
In this paper, we explore how a programmable forwarding plane offered by new breed of network switches might naturally accelerate consensus protocols, specifically focusing on Paxos. The performance protocols has long been concern. By implementing Paxos in the plane, are able to significantly increase throughput and reduce latency. Our P4-based implementation running an ASIC isolation can process over 2.5 billion messages per second, four orders magnitude improvement widely-used software...
Iterative Stencil Loops (ISLs) are a specific class of algorithms great importance for their substantial presence in lot industrial and scientific computing applications, such as numerical methods solving partial differential equation - e.g. reverse time migration heat distribution simulation or cellular automata used instance random number generation error correction. In this work, we propose hardware acceleration methodology based on the polyhedral model implement related framework to...
Due to their performance and flexibility, FPGAs are an attractive platform for the execution of network functions. It has been a challenge long time though make FPGA programming accessible large audience developers. An appealing solution is compile code from general-purpose language hardware using high-level synthesis. Unfortunately, current approaches implement rich functionality insufficient because they lack: (i) libraries with abstractions common operations data structures, (ii) bindings...
This paper proposes a new heterogeneous approach to programmable architecture that extends the capabilities of switch ASICs with FPGAs. It identifies key challenges in building network architecture, and presents concrete design implementation based around proof-of-concept data deduplication application. Our prototype demonstrates use FPGAs accelerate storage fingerprinting, running at 10G 100G line rate. is modular, scalable generalizes wide range applications.
Bugs in network hardware can cause tremendous problems. However, programmable devices have the potential to provide greater visibility into internal behavior of devices, allowing us more quickly find and identify In this paper, we a taxonomy data plane bugs, use derive Portable Test Architecture (PTA) which offers essential abstractions for testing on variety devices. PTA is implemented with novel design that (i) separates target-specific from target-independent components, portability, (ii)...
Due to the emerging trend of programmable network hardware, developers have begun explore ways accelerate various applications and services. As a result, there is pressing need for new tools techniques debugging devices. This paper presents NetDebug, fully hardware-software framework validating real-time data planes. We describe validation use cases, compare our design alternative solutions, present preliminary evaluation using prototype implementation.
Consensus protocols are the foundation for building fault-tolerant, distributed systems, and services. They also widely acknowledged as performance bottlenecks. Several recent systems have proposed accelerating these using network data plane. But, while network-accelerated consensus shows great promise, current suffer from an important limitation: they assume that hardware accelerates application itself. Consequently, provide a specialized replicated service, rather than providing...
Consensus protocols are the foundation for building many fault-tolerant distributed systems and services. This paper posits that there significant performance benefits to be gained by offering consensus as a network service (CAANS). CAANS leverages recent advances in commodity networking hardware design programmability implement protocol logic devices. provides complete Paxos protocol, is drop-in replacement software-based implementations of Paxos, makes no restrictions on topologies,...
Bugs in network hardware can cause tremendous problems. However, programmable devices have the potential to provide greater visibility into internal behavior of devices, allowing us more quickly find and identify In this paper, we a taxonomy data plane bugs, use derive Portable Test Architecture (PTA) which offers essential abstractions for testing on variety devices. PTA is implemented with novel design that (i) separates target-specific from target-independent components, portability, (ii)...